Ultralow-dielectric-constant amorphous boron nitride.

Decrease in processing speed due to increased resistance and capacitance delay is a major obstacle for the down-scaling of electronics1-3. Minimizing the dimensions of interconnects (metal wires that connect different electronic components on a chip) is crucial for the miniaturization of devices. Interconnects are isolated from each other by non-conducting (dielectric) layers. So far, research has mostly focused on decreasing the resistance of scaled interconnects because integration of dielectrics using low-temperature deposition processes compatible with complementary metal-oxide-semiconductors is technically challenging. Interconnect isolation materials must have low relative dielectric constants (κ values), serve as diffusion barriers against the migration of metal into semiconductors, and be thermally, chemically and mechanically stable. Specifically, the International Roadmap for Devices and Systems recommends4 the development of dielectrics with κ values of less than 2 by 2028. Existing low-κ materials (such as silicon oxide derivatives, organic compounds and aerogels) have κ values greater than 2 and poor thermo-mechanical properties5. Here we report three-nanometre-thick amorphous boron nitride films with ultralow κ values of 1.78 and 1.16 (close to that of air, κ = 1) at operation frequencies of 100 kilohertz and 1 megahertz, respectively. The films are mechanically and electrically robust, with a breakdown strength of 7.3 megavolts per centimetre, which exceeds requirements. Cross-sectional imaging reveals that amorphous boron nitride prevents the diffusion of cobalt atoms into silicon under very harsh conditions, in contrast to reference barriers. Our results demonstrate that amorphous boron nitride has excellent low-κ dielectric characteristics for high-performance electronics.

Vertical MoS2 Double-Layer Memristor with Electrochemical Metallization as an Atomic-Scale Synapse with Switching Thresholds Approaching 100 mV.

Atomically thin two-dimensional (2D) materials-such as transition metal dichalcogenide (TMD) monolayers and hexagonal boron nitride (hBN)-and their van der Waals layered preparations have been actively researched to build electronic devices such as field-effect transistors, junction diodes, tunneling devices, and, more recently, memristors. Two-dimensional material memristors built in lateral form, with horizontal placement of electrodes and the 2D material layers, have provided an intriguing window into the motions of ions along the atomically thin layers. On the other hand, 2D material memristors built in vertical form with top and bottom electrodes sandwiching 2D material layers may provide opportunities to explore the extreme of the memristive performance with the atomic-scale interelectrode distance. In particular, they may help push the switching voltages to a lower limit, which is an important pursuit in memristor research in general, given their roles in neuromorphic computing. In fact, recently Akinwande et al. performed a pioneering work to demonstrate a vertical memristor that sandwiches a single MoS2 monolayer between two inert Au electrodes, but it could neither attain switching voltages below 1 V nor control the switching polarity, obtaining both unipolar and bipolar switching devices. Here, we report a vertical memristor that sandwiches two MoS2 monolayers between an active Cu top electrode and an inert Au bottom electrode. Cu ions diffuse through the MoS2 double layers to form atomic-scale filaments. The atomic-scale thickness, combined with the electrochemical metallization, lowers switching voltages down to 0.1-0.2 V, on par with the state of the art. Furthermore, our memristor achieves consistent bipolar and analogue switching, and thus exhibits the synapse-like learning behavior such as the spike-timing dependent plasticity (STDP), the very first STDP demonstration among all 2D-material-based vertical memristors. The demonstrated STDP with low switching voltages is promising not only for low-power neuromorphic computing, but also from the point of view that the voltage range approaches the biological action potentials, opening up a possibility for direct interfacing with mammalian neuronal networks.

Two-Dimensional Materials Inserted at the Metal/Semiconductor Interface: Attractive Candidates for Semiconductor Device Contacts.

Metal-semiconductor junctions are indispensable in semiconductor devices, but they have recently become a major limiting factor precluding device performance improvement. Here, we report the modification of a metal/n-type Si Schottky contact barrier by the introduction of two-dimensional (2D) materials of either graphene or hexagonal boron nitride (h-BN) at the interface. We realized the lowest specific contact resistivities (ρc) of 3.30 nΩ cm2 (lightly doped n-type Si, ∼ 1015/cm3) and 1.47 nΩ cm2 (heavily doped n-type Si, ∼ 1021/cm3) via 2D material insertion are approaching the theoretical limit of 1.3 nΩ cm2. We demonstrated the role of the 2D materials at the interface in achieving a low ρc value by the following mechanisms: (a) 2D materials effectively form dipoles at the metal-2D material (M/2D) interface, thereby reducing the metal work function and changing the pinning point, and (b) the fully metalized M/2D system shifts the pinning point toward the Si conduction band, thus decreasing the Schottky barrier. As a result, the fully metalized M/2D system using atomically thin and well-defined 2D materials shows a significantly reduced ρc. The proposed 2D material insertion technique can be used to obtain extremely low contact resistivities in metal/n-type Si systems and will help to achieve major performance improvements in semiconductor technologies.

Ultraclean Interface of Metal Chalcogenides with Metal through Confined Interfacial Chalcogenization.

Acquisition of defect-free transition metal dichalcogenides (TMDs) channels with clean heterojunctions is a critical issue in the production of TMD-based functional electronic devices. Conventional approaches have transferred TMD onto a target substrate, and then apply the typical device fabrication processes. Unfortunately, those processes cause physical and chemical defects in the TMD channels. Here, a novel synthetic process of TMD thin films, named confined interfacial chalcogenization (CIC) is proposed. In the proposed synthesis, a uniform TMDlayer is created at the Au/transition metal (TM) interface by diffusion of chalcogen through the upper Au layer and the reaction of chalcogen with the underlying TM. CIC allows for ultraclean heterojunctions with the metals, synthesis of various homo- and hetero-structured TMDs, and in situ TMD channel formation in the last stage of device fabrication. The mechanism of TMD growth is revealed by the TM-accelerated chalcogen diffusion, epitaxial growth of TMD on Au(111). We demonstrated a wafer-scale TMD-based vertical memristors which exhibit excellent statistical concordance in device performance enabled by the ultraclean heterojunctions and superior uniformity in thickness. CIC proposed in this study represents a breakthrough in in TMD-based electronic device fabrication and marking a substantial step toward practical next-generation integrated electronics.

Single-step formation of a graphene-metal hybrid transparent and electrically conductive film.

We report here a rapid (10 s of heating) graphene growth method that can be carried out on any desired substrate, including an insulator, thus negating the need for the transfer from the metal substrate. This technique is based on metal-induced crystallization of amorphous carbon (a-C) to graphene, and involves an ultra-thin metal layer that is less than 10 nm in thickness. Rapid annealing of a bilayer of a-C and metal deposited on the surface leads to the formation of graphene film, and to subsequent breaking-up of the thin metal layer underneath the film, thus resulting in the formation of a graphene­metal hybrid film which is both transparent and electrically conducting. Based on Raman studies, we have also systematically compared ultra-thin metal-induced crystallization behavior with a case of conventional thick metal. Based on the present investigation, it was observed that the dominant growth mechanism in ultra-thin metal-induced crystallization is nucleation controlled.

Theoretical and experimental study of nanopore drilling by a focused electron beam in transmission electron microscopy.

Sub-10 nm nanopores drilled by a focused electron beam in a transmission electron microscope are widely used in solid-state nanopore devices for DNA translocation. However, there still remains much controversy surrounding the drilling mechanism. In order to explain the drilling of nanopores by electrons, we undertook a theoretical consideration of the energy transfer from the fast electrons to the solid through such mechanisms as elastic and inelastic scattering. According to the calculations based on the scattering cross-section, the direct atomic displacement cross-section induced by elastic scattering increases with increasing incident electron energy, while the ionization cross-section and temperature increment decrease. We performed nanopore drilling in a Si3N4 membrane using two different electron energies, 200 and 300 kV, to identify the drilling mechanism. The dependence of the nanopore drilling on the incident electron energy was well matched with the direct atomic displacement.

Sub-10-nm nanochannels by self-sealing and self-limiting atomic layer deposition.

We report on a novel fabrication method of a nanochannel ionic field effect transistor (IFET) structure with sub-10-nm dimensions. A self-sealing and self-limiting atomic layer deposition (ALD) facilitates the fabrication of lateral type nanochannels smaller than the e-beam or optical lithographic limits. Using highly conformal ALD film structures, including TiO(2), TiO(2)/TiN, and Al(2)O(3)/Ru, we have fabricated lateral sub-10-nm nanochannels with good control over channel diameter. Nanochannels surrounded by core/shell (high-k dielectric/metal) layers give rise to all-around-gating IFETs, an important functional element in an electrofluidic-based circuit system.

An Atomically Thin Optoelectronic Machine Vision Processor.

2D semiconductors, especially transition metal dichalcogenide (TMD) monolayers, are extensively studied for electronic and optoelectronic applications. Beyond intensive studies on single transistors and photodetectors, the recent advent of large-area synthesis of these atomically thin layers has paved the way for 2D integrated circuits, such as digital logic circuits and image sensors, achieving an integration level of ≈100 devices thus far. Here, a decisive advance in 2D integrated circuits is reported, where the device integration scale is increased by tenfold and the functional complexity of 2D electronics is propelled to an unprecedented level. Concretely, an analog optoelectronic processor inspired by biological vision is developed, where 32 × 32 = 1024 MoS2 photosensitive field-effect transistors manifesting persistent photoconductivity (PPC) effects are arranged in a crossbar array. This optoelectronic processor with PPC memory mimics two core functions of human vision: it captures and stores an optical image into electrical data, like the eye and optic nerve chain, and then recognizes this electrical form of the captured image, like the brain, by executing analog in-memory neural net computing. In the highlight demonstration, the MoS2 FET crossbar array optically images 1000 handwritten digits and electrically recognizes these imaged data with 94% accuracy.

High-Throughput Growth of Wafer-Scale Monolayer Transition Metal Dichalcogenide via Vertical Ostwald Ripening.

For practical device applications, monolayer transition metal dichalcogenide (TMD) films must meet key industry needs for batch processing, including the high-throughput, large-scale production of high-quality, spatially uniform materials, and reliable integration into devices. Here, high-throughput growth, completed in 12 min, of 6-inch wafer-scale monolayer MoS2 and WS2 is reported, which is directly compatible with scalable batch processing and device integration. Specifically, a pulsed metal-organic chemical vapor deposition process is developed, where periodic interruption of the precursor supply drives vertical Ostwald ripening, which prevents secondary nucleation despite high precursor concentrations. The as-grown TMD films show excellent spatial homogeneity and well-stitched grain boundaries, enabling facile transfer to various target substrates without degradation. Using these films, batch fabrication of high-performance field-effect transistor (FET) arrays in wafer-scale is demonstrated, and the FETs show remarkable uniformity. The high-throughput production and wafer-scale automatable transfer will facilitate the integration of TMDs into Si-complementary metal-oxide-semiconductor platforms.

Postoperative negative pressure pulmonary edema following repetitive laryngospasm even after reversal of neuromuscular blockade by sugammadex: a case report.

Laryngospasm, an occlusion of the glottis, can occur at any time during anesthesia, and is associated with serious perioperative complications such as hypoxia, hypercabia, aspiration, bronchospasm, arrhythmia, prolonged recovery, cardiac collapse, and eventually catastrophic death. Importantly, postoperative negative pressure pulmonary edema (NPPE) is a rare, but well described life-threatening complication related to acute and chronic upper airway obstruction. Sugammadex well known for affirmatively reducing the postoperative pulmonary complications associated with residual neuromuscular blockade may have an indirect role in triggering the negative intrathoracic pressure by raising a rapid and efficacious respiratory muscle strength in acute upper airway obstruction. Herein, we report a case of postoperative NPPE following repetitive laryngospasm even after reversal of rocuronium-induced neuromuscular blockade using sugammadex.

Mesostructured HfxAlyO2 Thin Films as Reliable and Robust Gate Dielectrics with Tunable Dielectric Constants for High-Performance Graphene-Based Transistors.

We introduce a reliable and robust gate dielectric material with tunable dielectric constants based on a mesostructured HfxAlyO2 film. The ultrathin mesostructured HfxAlyO2 film is deposited on graphene via a physisorbed-precursor-assisted atomic layer deposition process and consists of an intermediate state with small crystallized parts in an amorphous matrix. Crystal phase engineering using Al dopant is employed to achieve HfO2 phase transitions, which produce the crystallized part of the mesostructured HfxAlyO2 film. The effects of various Al doping concentrations are examined, and an enhanced dielectric constant of ∼25 is obtained. Further, the leakage current is suppressed (∼10(-8) A/cm(2)) and the dielectric breakdown properties are enhanced (breakdown field: ∼7 MV/cm) by the partially remaining amorphous matrix. We believe that this contribution is theoretically and practically relevant because excellent gate dielectric performance is obtained. In addition, an array of top-gated metal-insulator-graphene field-effect transistors is fabricated on a 6 in. wafer, yielding a capacitance equivalent oxide thickness of less than 1 nm (0.78 nm). This low capacitance equivalent oxide thickness has important implications for the incorporation of graphene into high-performance silicon-based nanoelectronics.

Thickness scaling of atomic-layer-deposited HfO2 films and their application to wafer-scale graphene tunnelling transistors.

The downscaling of the capacitance equivalent oxide thickness (CET) of a gate dielectric film with a high dielectric constant, such as atomic layer deposited (ALD) HfO2, is a fundamental challenge in achieving high-performance graphene-based transistors with a low gate leakage current. Here, we assess the application of various surface modification methods on monolayer graphene sheets grown by chemical vapour deposition to obtain a uniform and pinhole-free ALD HfO2 film with a substantially small CET at a wafer scale. The effects of various surface modifications, such as N-methyl-2-pyrrolidone treatment and introduction of sputtered ZnO and e-beam-evaporated Hf seed layers on monolayer graphene, and the subsequent HfO2 film formation under identical ALD process parameters were systematically evaluated. The nucleation layer provided by the Hf seed layer (which transforms to the HfO2 layer during ALD) resulted in the uniform and conformal deposition of the HfO2 film without damaging the graphene, which is suitable for downscaling the CET. After verifying the feasibility of scaling down the HfO2 thickness to achieve a CET of ~1.5 nm from an array of top-gated metal-oxide-graphene field-effect transistors, we fabricated graphene heterojunction tunnelling transistors with a record-low subthreshold swing value of <60 mV/dec on an 8" glass wafer.

A Mask-Free Passivation Process for Low Noise Nanopore Devices.

Solid-state nanopores have been studied widely for the label-free analysis of single biomolecules. The translocation of charged biomolecules through a solid-state nanopore is driven by the applied voltage across a thin membrane. The ionic current changes in response to the translocation of DNA through the nanopore. Solid-state nanopores have many advantages over biological nanopores, such as α-hemolysin and MspA, but the high DNA translocation velocity and the inherent noise in solid-state nanopores have hindered its applications to more precise measurements, such as DNA sequencing. This paper reports a simple and reproducible way of passivating the surface of a nanopore device using an insulating layer, photodefinable PDMS (P-PDMS), to reduce noise and enhance the accuracy of the electrical measurements. This new approach does not require a separate photo-mask or sophisticated micro-alignment equipment to pattern the insulating layer. The pit structure on the back side of the support chip serves as a mask, enabling mask-free photolithography, and the insulating layer only on top of the free-standing silicon nitride membrane can be irradiated selectively by UV and removed by subsequent development in toluene. The resulting nanopore device with a small free standing silicon nitride membrane surrounded by a thick insulating layer showed improved noise characteristics. The root-mean-square noise of the ionic current was reduced to 3.8 pA from 90.8 pA by the formation of a micron-thick insulating layer. The overall performance of the nanopores with an insulating layer was improved significantly when tested with the double-stranded DNA (λ-DNA).

A low-noise solid-state nanopore platform based on a highly insulating substrate.

A solid-state nanopore platform with a low noise level and sufficient sensitivity to discriminate single-strand DNA (ssDNA) homopolymers of poly-A40 and poly-T40 using ionic current blockade sensing is proposed and demonstrated. The key features of this platform are (a) highly insulating dielectric substrates that are used to mitigate the effect of parasitic capacitance elements, which decrease the ionic current RMS noise level to sub-10 pA and (b) ultra-thin silicon nitride membranes with a physical thickness of 5 nm (an effective thickness of 2.4 nm estimated from the ionic current) are used to maximize the signal-to-noise ratio and the spatial depth resolution. The utilization of an ultra-thin membrane and a nanopore diameter as small as 1.5 nm allow the successful discrimination of 40 nucleotide ssDNA poly-A40 and poly-T40. Overall, we demonstrate that this platform overcomes several critical limitations of solid-state nanopores and opens the door to a wide range of applications in single-molecule-based detection and analysis.