Experimental demonstration of combination-encoding content-addressable memory of 0.75 bits per switch utilizing Hf-Zr-O ferroelectric tunnel junctions.

We experimentally demonstrate the concept of combination-encoding content-addressable memory (CECAM) that offers much higher content density than any other content-addressable memory devices proposed to date. In this work, CECAM was fabricated and validated with a hafnium-zirconium oxide (HZO) ferroelectric tunnel junction (FTJ) crossbar array. The new CAM structure, which utilizes nonvolatile memory devices, offers numerous advantages including low-current operation (FTJ), standby power reduction (ferroelectric HZO), and increased content density. Multibit data are encoded and stored in multi-switch CECAM. Perfect-match searching in CECAM with a reasonable match current (lower than nA) for different sizes of CECAM has been validated from a novel CAM device. We demonstrate N-CECAM (with keys encoded into 2N-long binary arrays) for N = 3 (using 6 FTJs) and 4 (using 8 FTJs), leading to content densities of 0.667 and 0.75 bits per switch, which highlight 33% and 50% increase in content density compared to that of the conventional TCAM (0.5 bits per switch).

Formation techniques for upper active channel in monolithic 3D integration: an overview.

The concept of three-dimensional stacking of device layers has attracted significant attention with the increasing difficulty in scaling down devices. Monolithic 3D (M3D) integration provides a notable benefit in achieving a higher connection density between upper and lower device layers than through-via-silicon. Nevertheless, the practical implementation of M3D integration into commercial production faces several technological challenges. Developing an upper active channel layer for device fabrication is the primary challenge in M3D integration. The difficulty arises from the thermal budget limitation for the upper channel process because a high thermal budget process may degrade the device layers below. This paper provides an overview of the potential technologies for forming active channel layers in the upper device layers of M3D integration, particularly for complementary metal-oxide-semiconductor devices and digital circuits. Techniques are for polysilicon, single crystal silicon, and alternative channels, which can solve the temperature issue for the top layer process.

The role of NF-κB in breast cancer initiation, growth, metastasis, and resistance to chemotherapy.

Breast cancer (BC) is the second most fatal disease and is the prime cause of cancer allied female deaths. BC is caused by aberrant tumor suppressor genes and oncogenes regulated by transcription factors (TFs) like NF-κB. NF-κB is a pro-inflammatory TF that crucially alters the expressions of various genes associated with inflammation, cell progression, metastasis, and apoptosis and modulates a network of genes that underlie tumorigenesis. Herein, we focus on NF-κB signaling pathways, its regulators, and the rationale for targeting NF-κB. This review also includes TFs that maintain NF-κB crosstalk and their roles in promoting angiogenesis and metastasis. In addition, we discuss the importance of combination therapies, resistance to treatment, and potential novel therapeutic strategies including nanomedicine that targets NF-κB.

Impact of Pt grain size on ferroelectric properties of zirconium hafnium oxide by chemical solution deposition.

The effects of the grain size of Pt bottom electrodes on the ferroelectricity of hafnium zirconium oxide (HZO) were studied in terms of the orthorhombic phase transformation. HZO thin films were deposited by chemical solution deposition on the Pt bottom electrodes with various grain sizes which had been deposited by direct current sputtering. All the samples were crystallized by rapid thermal annealing at 700 °C to allow a phase transformation. The crystallographic phases were determined by grazing incidence X-ray diffraction, which showed that the bottom electrode with smaller Pt grains resulted in a larger orthorhombic phase composition in the HZO film. As a result, capacitors with smaller Pt grains for the bottom electrode showed greater ferroelectric polarization. The smaller grains produced larger in-plane stress which led to more orthorhombic phase transformation and higher ferroelectric polarization.

Double-gate thin film transistor with suspended-gate applicable to tactile force sensor.

This paper presents a straightforward, low-cost, and effective integration process for the fabrication of membrane gate thin film transistors (TFTs) with an air gap. The membrane gate TFT with an air gap can be used as the highly sensitive tactile force sensor. The suspended membrane gate with an air gap as the insulator layer is formed by multiple photolithography steps and photoresist sacrificial layers. The viscosity of the photoresist and the spin speed was used to modify the thickness of the air gap during the coating process. The tactile force was measured by monitoring the drain current of the TFT as the force changed the thickness of the air gap. The sensitivity of the devices was enhanced by an optimal gate size and low Young's modulus of the gate material. This simple process has the potential for the production of small, versatile, and highly sensitive sensors.

Low Temperature Thermal Atomic Layer Deposition of Aluminum Nitride Using Hydrazine as the Nitrogen Source.

Aluminum nitride (AlN) thin films were grown using thermal atomic layer deposition in the temperature range of 175-350 °C. The thin films were deposited using trimethyl aluminum (TMA) and hydrazine (N2H4) as a metal precursor and nitrogen source, respectively. Highly reactive N2H4, compared to its conventionally used counterpart, ammonia (NH3), provides a higher growth per cycle (GPC), which is approximately 2.3 times higher at a deposition temperature of 300 °C and, also exhibits a low impurity concentration in as-deposited films. Low temperature AlN films deposited at 225 °C with a capping layer had an Al to N composition ratio of 1:1.1, a close to ideal composition ratio, with a low oxygen content (7.5%) while exhibiting a GPC of 0.16 nm/cycle. We suggest that N2H4 as a replacement for NH3 is a good alternative due to its stringent thermal budget.

A Comprehensive Study on the Effect of TiN Top and Bottom Electrodes on Atomic Layer Deposited Ferroelectric Hf0.5Zr0.5O2 Thin Films.

The discovery of ferroelectricity in HfO2-based materials in 2011 provided new research directions and opportunities. In particular, for atomic layer deposited Hf0.5Zr0.5O2 (HZO) films, it is possible to obtain homogenous thin films with satisfactory ferroelectric properties at a low thermal budget process. Based on experiment demonstrations over the past 10 years, it is well known that HZO films show excellent ferroelectricity when sandwiched between TiN top and bottom electrodes. This work reports a comprehensive study on the effect of TiN top and bottom electrodes on the ferroelectric properties of HZO thin films (10 nm). Investigations showed that during HZO crystallization, the TiN bottom electrode promoted ferroelectric phase formation (by oxygen scavenging) and the TiN top electrode inhibited non-ferroelectric phase formation (by stress-induced crystallization). In addition, it was confirmed that the TiN top and bottom electrodes acted as a barrier layer to hydrogen diffusion into the HZO thin film during annealing in a hydrogen-containing atmosphere. These features make the TiN electrodes a useful strategy for improving and preserving the ferroelectric properties of HZO thin films for next-generation memory applications.

Residual Image Suppression Through Annealing Process of Amorphous Indium Gallium Zinc Oxide Thin Film Transistor for Plastic Organic Light-Emitting Diode Display.

For the evaluation of the residual image suppression, the amorphous indium-gallium-zinc-oxide thin film transistor was manufactured with electric field shield metal on silicon oxide multi-buffer layer, without the need for a silicon crystallization process through the excimer laser process, and is advantageous for the manufacture of large-scale plastic organic light-emitting display. We conducted a study on the propensity to suppress a residual image according to the temperature of the annealing process in amorphous indium gallium zinc oxide. The evaluation divided by the ambient process temperature conditions to measure the change and restoration tendency of the gray current by the black/white current of thin film transistors, and for precise measurement of the current change intervals, the current was analyzed in 0.004 seconds per point. Through the study, residual image of amorphous Indium Gallium Zinc Oxide transistor was found to be suppressed as the temperature of the annealing crystallization increased from 250°C to 325°C, and there was no improvement effect on the 325°C or higher. The trend of threshold voltage shift of thin film transistors according to the two process temperature conditions, 250°C and 325°C, was analyzed by Two sample T analysis method, and the analysis confirmed that the trend of current deterioration is different through p-value 0.007.

Residual Image Reduction Using Electric Field Shield Metal in Plastic Organic Light-Emitting Diode Display.

A plastic organic light-emitting diode display is a device that emits light in an organic layer in proportion to the amount of current applied from a thin film transistor, which constitutes a pixel. However, it was confirmed that the residual image was shown by the operation of the thin film transistor. To suppress residual image, the effect of electric field was studied in operation of a-IGZO thin film transistor. The a-IGZO thin film transistor, in which a polyimide film was used as a substrate, was applied as a driving thin film transistor for pixel circuits in a plastic organic light-emitting diode display, and the effect of the electric field behavior inside the film on residual images was studied. Residual images were strongly connection with the electric field distribution characteristics inside the polyimide substrate, and they were reduced by introducing an electric field shield metal layer in the a-IGZO thin film transistor. The correlation between residual image generation and the operation of the a-IGZO thin film transistor was further explained through technology computer-aided design simulation (Silvaco Group Inc.).

Minimizing Residual Images of Amorphous Indium Gallium Zinc Oxide Thin-Film Transistor-Based Flexible Organic Light-Emitting Diode Displays by Controlling Oxygen Partial Pressure.

Plastic organic light emitting diode displays suffer from residual image, which is closely connected with the hysteresis of the driving thin-film transistor in the pixels. Therefore, in researching paper, we manufactured an OLED display comprise a polyimide substrate and an amorphous indium gallium zinc oxide thin film transistor active layer. Paper proposed a solution for reducing hysteresis through oxygen partial pressure control and evaluated it using hysteresis analysis. The results showed that hysteresis is strongly dependent on the threshold voltage is settled by the oxygen partial pressure while active layer deposition of the TFT. Moreover, hysteresis decreases with increasing temperature.

A Neuromorphic Device Implemented on a Salmon-DNA Electrolyte and its Application to Artificial Neural Networks.

A bioinspired neuromorphic device operating as synapse and neuron simultaneously, which is fabricated on an electrolyte based on Cu2+-doped salmon deoxyribonucleic acid (S-DNA) is reported. Owing to the slow Cu2+ diffusion through the base pairing sites in the S-DNA electrolyte, the synaptic operation of the S-DNA device features special long-term plasticity with negative and positive nonlinearity values for potentiation and depression (αp and αd), respectively, which consequently improves the learning/recognition efficiency of S-DNA-based neural networks. Furthermore, the representative neuronal operation, "integrate-and-fire," is successfully emulated in this device by adjusting the duration time of the input voltage stimulus. In particular, by applying a Cu2+ doping technique to the S-DNA neuromorphic device, the characteristics for synaptic weight updating are enhanced (|αp|: 31→20, |αd|: 11→18, weight update margin: 33→287 nS) and also the threshold conditions for neuronal firing (amplitude and number of stimulus pulses) are modulated. The improved synaptic characteristics consequently increase the Modified National Institute of Standards and Technology (MNIST) pattern recognition rate from 38% to 44% (single-layer perceptron model) and from 89.42% to 91.61% (multilayer perceptron model). This neuromorphic device technology based on S-DNA is expected to contribute to the successful implementation of a future neuromorphic system that simultaneously satisfies high integration density and remarkable recognition accuracy.

Optimal Nitrogen Incorporation in Nickel Silicide for Thermally Stable Contact Formation.

Nickel silicide (NiSi) is commonly used as a contact material for metal junctions but the poor thermal instability of NiSi above 600 °C has limited the further scaling down of devices and the implementation of novel schemes, such as monolithic 3-dimensional integration. This paper suggests a process to improve the thermal stability of NiSi through nitrogen incorporation during the silicidation process. The optimal level of nitrogen incorporation in NiSi reduced the nickel diffusion rate and enhanced the thermal stability by preventing the formation of a nickel disilicide phase. On the other hand, a higher level of N incorporation led to Ni3N formation, which impeded the complete transformation to NiSi. Therefore, it is essential to incorporate the optimal content of N. In this study, NiSi with 3.9% N incorporation showed superior electrical characteristics, such as the sheet resistance, junction leakage, and stable Schottky barrier height, even after high-temperature post silicidation annealing at 600 °C for 30 min.

Effects of H2 High-pressure Annealing on HfO2/Al2O3/In0.53Ga0.47As Capacitors: Chemical Composition and Electrical Characteristics.

We studied the impact of H2 pressure during post-metallization annealing on the chemical composition of a HfO2/Al2O3 gate stack on a HCl wet-cleaned In0.53Ga0.47As substrate by comparing the forming gas annealing (at atmospheric pressure with a H2 partial pressure of 0.04 bar) and H2 high-pressure annealing (H2-HPA at 30 bar) methods. In addition, the effectiveness of H2-HPA on the passivation of the interface states was compared for both p- and n-type In0.53Ga0.47As substrates. The decomposition of the interface oxide and the subsequent out-diffusion of In and Ga atoms toward the high-k film became more significant with increasing H2 pressure. Moreover, the increase in the H2 pressure significantly improved the capacitance‒voltage characteristics, and its effect was more pronounced on the p-type In0.53Ga0.47As substrate. However, the H2-HPA induced an increase in the leakage current, probably because of the out-diffusion and incorporation of In/Ga atoms within the high-k stack.

The Effect of Interfacial Dipoles on the Metal-Double Interlayers-Semiconductor Structure and Their Application in Contact Resistivity Reduction.

We demonstrate the contact resistance reduction for III-V semiconductor-based electrical and optical devices using the interfacial dipole effect of ultrathin double interlayers in a metal-interlayers-semiconductor (M-I-S) structure. An M-I-S structure blocks metal-induced gap states (MIGS) to a sufficient degree to alleviate Fermi level pinning caused by MIGS, resulting in contact resistance reduction. In addition, the ZnO/TiO2 interlayers of an M-I-S structure induce an interfacial dipole effect that produces Schottky barrier height (ΦB) reduction, which reduces the specific contact resistivity (ρc) of the metal/n-type III-V semiconductor contact. As a result, the Ti/ZnO(0.5 nm)/TiO2(0.5 nm)/n-GaAs metal-double interlayers-semiconductor (M-DI-S) structure achieved a ρc of 2.51 × 10-5 Ω·cm2, which exhibited an ∼42 000× reduction and an ∼40× reduction compared to the Ti/n-GaAs metal-semiconductor (M-S) contact and the Ti/TiO2(0.5 nm)/n-GaAs M-I-S structure, respectively. The interfacial dipole at the ZnO/TiO2 interface was determined to be approximately -0.104 eV, which induced a decrease in the effective work function of Ti and, therefore, reduced ΦB. X-ray photoelectron spectroscopy analysis of the M-DI-S structure also confirmed the existence of the interfacial dipole. On the basis of these results, the M-DI-S structure offers a promising nonalloyed Ohmic contact scheme for the development of III-V semiconductor-based applications.

Li-Assisted Low-Temperature Phase Transitions in Solution-Processed Indium Oxide Films for High-Performance Thin Film Transistor.

Lithium (Li)-assisted indium oxide (In2O3) thin films with ordered structures were prepared on solution-processed zirconium oxide (ZrO2) gate dielectrics by spin-casting and thermally annealing hydrated indium nitrate solutions with different Li nitrate loadings. It was found that the Li-assisted In precursor films on ZrO2 dielectrics could form crystalline structures even at processing temperatures (T) below 200 °C. Different In oxidation states were observed in the Li-doped films, and the development of such states was significantly affected by both temperature and the mol% of Li cations, [Li(+)]/([In(3+)] + [Li(+)]), in the precursor solutions. Upon annealing the Li-assisted precursor films below 200 °C, metastable indium hydroxide and/or indium oxyhydroxide phases were formed. These phases were subsequently transformed into crystalline In2O3 nanostructures after thermal dehydration and oxidation. Finally, an In2O3 film doped with 13.5 mol% Li(+) and annealed at 250 °C for 1 h exhibited the highest electron mobility of 60 cm(2) V(-1) s(-1) and an on/off current ratio above 10(8) when utilized in a thin film transistor.

High Performance Metal Oxide Field-Effect Transistors with a Reverse Offset Printed Cu Source/Drain Electrode.

Nonvacuum and photolithography-free copper (Cu) films were prepared by reverse offset printing. The mechanical, morphological, structural, and chemical properties of the Cu films annealed at different temperatures were examined in detail. The Ostwald ripening-induced coalescence and grain growth in the printing Cu films were enhanced with increasing annealing temperature in N2 ambient up to 400 °C. Simultaneously, unwanted chemical impurities such as oxygen, hydrogen, and carbon in the Cu films decreased as the annealing temperature increased. The high electrical conductivity (∼6.2 µΩ·cm) of the printing Cu films annealed at 400 °C is attributed to the enlargement of the grain size and reduction of the incorporation of impurities. A printing Cu film was adopted as a source/drain (S/D) electrode in solution processable zinc tin oxide (ZTO) field-effect transistors (FETs), where the ZTO film was prepared by simple spin-coating. The ZTO FETs fabricated at a contact annealing temperature of 250 °C exhibited a promising field-effect mobility of 2.6 cm(2)/(V s), a threshold voltage of 7.0 V, and an ION/OFF modulation ratio of 2 × 10(5).

Effects of La Incorporation in Hf Based Dielectric on Leakage Conduction and Carrier Scattering Mechanisms.

Metal-oxide-semiconductor field effect transistors (MOSFETs) with various doses of La-incorporated in Hafnium-based dielectrics were characterized to evaluate the effect of La on dielectric and device properties. It is found that the Poole-Frenkel emission model could explain our experimental leakage current conduction mechanism reasonably and barrier heights of localized Poole-Frenkel trap sites increase gradually with increasing La incorporation. Cryogenic measurement (from 100 K to 300 K) of MOSFETs reveals that, as the content of La incorporation in the dielectric increases, the more increase of maximum effective mobility has been found at low temperature. It is mainly attributed to the more reduction of phonon scattering due to higher content of La atoms at the interface of dielectric and channel. Though it is relatively small, the existence of La in dielectric reduces coulomb scattering rate as well.

Solution-processable LaZrOx/SiO2 gate dielectric at low temperature of 180 °C for high-performance metal oxide field-effect transistors.

Although solution-processable high-k inorganic dielectrics have been implemented as a gate insulator for high-performance, low-cost transition metal oxide field-effect transistors (FETs), the high-temperature annealing (>300 °C) required to achieve acceptable insulating properties still limits the facile realization of flexible electronics. This study reports that the addition of a 2-dimetylamino-1-propanol (DMAPO) catalyst to a perhydropolysilazane (PHPS) solution enables a significant reduction of the curing temperature for the resulting SiO2 dielectrics to as low as 180 °C. The hydrolysis and condensation of the as-spun PHPS film under humidity conditions were enhanced greatly by the presence of DMAPO, even at extremely low curing temperatures, which allowed a smooth surface (roughness of 0.31 nm) and acceptable leakage characteristics (1.8 × 10(-6) A/cm(2) at an electric field of 1MV/cm) of the resulting SiO2 dielectric films. Although the resulting indium zinc oxide (IZO) FETs exhibited an apparent high mobility of 261.6 cm(2)/(V s), they suffered from a low on/off current (ION/OFF) ratio and large hysteresis due to the hygroscopic property of silazane-derived SiO2 film. The ION/OFF value and hysteresis instability of IZO FETs was improved by capping the high-k LaZrOx dielectric on a solution-processed SiO2 film via sol-gel processing at a low temperature of 180 °C while maintaining a high mobility of 24.8 cm(2)/(V s). This superior performance of the IZO FETs with a spin-coated LaZrOx/SiO2 bilayer gate insulator can be attributed to the efficient intercalation of the 5s orbital of In(3+) ion in the IZO channel, the good interface matching of IZO/LaZrOx and the carrier blocking ability of PHPS-derived SiO2 dielectric film. Therefore, the solution-processable LaZrOx/SiO2 stack can be a promising candidate as a gate dielectric for low-temperature, high-performance, and low-cost flexible metal oxide FETs.

Ti-doped indium tin oxide thin films for transparent field-effect transistors: control of charge-carrier density and crystalline structure.

Indium tin oxide (ITO) films are representative transparent conducting oxide media for organic light-emitting diodes, liquid crystal displays, and solar cell applications. Extending the utility of ITO films from passive electrodes to active channel layers in transparent field-effect transistors (FETs), however, has been largely limited because of the materials' high carrier density (>1 × 10(20) cm(-3)), wide band gap, and polycrystalline structure. Here, we demonstrate that control over the cation composition in ITO-based oxide films via solid doping of titanium (Ti) can optimize the carrier concentration and suppress film crystallization. On 120 nm thick SiO(2)/Mo (200 nm)/glass substrates, transparent n-type FETs prepared with 4 at % Ti-doped ITO films and fabricated via the cosputtering of ITO and TiO(2) exhibited high electron mobilities of 13.4 cm(2) V(-1) s(-1), a low subthreshold gate swing of 0.25 V decade(-1), and a high I(on/)I(off) ratio of >1 × 10(8).