Dimensional Scaling of Ferroelectric Properties of Hafnia-Zirconia Thin Films: Electrode Interface Effects.

Hafnia-based ferroelectric (FE) thin films are promising candidates for semiconductor memories. However, a fundamental challenge that persists is the lack of understanding regarding dimensional scaling, including thickness scaling and area scaling, of the functional properties and their heterogeneity in these films. In this work, excellent ferroelectricity and switching endurance are demonstrated in 4 nm-thick Hf0.5Zr0.5O2 (HZO) capacitors with molybdenum electrodes in capacitors as small as 65 nm × 45 nm in size. The HZO layer in these capacitors can be crystallized into the ferroelectric orthorhombic phase at the low temperature of 400 °C, making them compatible for back-end-of-line (BEOL) FE memories. With the benefits of thickness scaling, low operation voltage (1.2 V) is achieved with high endurance (>1010 cycles); however, a significant fatigue regime is noted. We observed that the bottom electrode, rather than the top electrode, plays a dominant role in the thickness scaling of HZO ferroelectric behavior. Furthermore, ultrahigh switched polarization (remanent polarization 2Pr ∼ 108 µC cm-2) is observed in some nanoscale devices. This study advances the understanding of dimensional scaling effects in HZO capacitors for high-performance FE memories.

Atomic Layer Deposition of WO3-Doped In2O3 for Reliable and Scalable BEOL-Compatible Transistors.

Tungsten oxide (WO3) doped indium oxide (IWO) field-effect transistors (FET), synthesized using atomic layer deposition (ALD) for three-dimensional integration and back-end-of-line (BEOL) compatibility, are demonstrated. Low-concentration (1∼4 W atom %) WO3-doping in In2O3 films is achieved by adjusting cycle ratios of the indium and tungsten precursors with the oxidant coreactant. Such doping suppresses oxygen deficiency from In2O2.5 to In2O3 stoichiometry with only 1 atom % W, allowing devices to turn off stably and enhancing threshold voltage stability. The ALD IWO FETs exhibit superior performance, including a low subthreshold slope of 67 mV/decade and negligible hysteresis. Strong tunability of the threshold voltage (Vth) is achieved through W concentration tuning, with 2 atom % IWO FETs showing an optimized Vth for enhancement-mode and a high drain current. ALD IWO FETs have remarkable stability under bias stress and nearly ideal performance extending to sub-100 nm channel lengths, making them promising candidates for high-performance monolithic 3D integrated devices.

Enhanced Switching Reliability of Hf0.5Zr0.5O2 Ferroelectric Films Induced by Interface Engineering.

Ferroelectric materials have been widely researched for applications in memory and energy storage. Among these materials and benefiting from their excellent chemical compatibility with complementary metal-oxide-semiconductor (CMOS) devices, hafnia-based ferroelectric thin films hold great promise for highly scaled semiconductor memories, including nonvolatile ferroelectric capacitors and transistors. However, variation in the switched polarization of this material during field cycling and a limited understanding of the responsible mechanisms have impeded their implementation in technology. Here, we show that ferroelectric Hf0.5Zr0.5O2 (HZO) capacitors that are nearly free of polarization "wake-up"─a gradual increase in switched polarization as a function of the number of switching cycles─can be achieved by introducing ultrathin HfO2 buffer layers at the HZO/electrodes interface. High-resolution transmission electron microscopy (HRTEM) reveals crystallite sizes substantially greater than the film thickness for the buffer layer capacitors, indicating that the presence of the buffer layers influences the crystallization of the film (e.g., a lower ratio of nucleation rate to growth rate) during postdeposition annealing. This evidently promotes the formation of a polar orthorhombic (O) phase in the as-fabricated buffer layer samples. Synchrotron X-ray diffraction (XRD) reveals the conversion of the nonpolar tetragonal (T) phase to the polar orthorhombic (O) phase during electric field cycling in the control (no buffer) devices, consistent with the polarization wake-up observed for these capacitors. The extent of T-O transformation in the nonbuffer samples is directly dependent on the duration over which the field is applied. These results provide insight into the role of the HZO/electrodes interface in the performance of hafnia-based ferroelectrics and the mechanisms driving the polarization wake-up effect.

Nanocrystallite Seeding of Metastable Ferroelectric Phase Formation in Atomic Layer-Deposited Hafnia-Zirconia Alloys.

Hafnia-based ferroelectric thin films are promising for semiconductor memory and neuromorphic computing applications. Amorphous, as-deposited, thin-film binary alloys of HfO2 and ZrO2 transform to the metastable, orthorhombic ferroelectric phase during post-deposition annealing and cooling. This transformation is generally thought to involve formation of a tetragonal precursor phase that distorts into the orthorhombic phase during cooling. In this work, we systematically study the effects of atomic layer deposition (ALD) temperature on the ferroelectricity of post-deposition-annealed Hf0.5Zr0.5O2 (HZO) thin films. Seed crystallites having interplanar spacings consistent with the polar orthorhombic phase are observed by a plan-view transmission electron microscope in HZO thin films deposited at an elevated ALD temperature. After ALD under conditions that promote formation of these nanocrystallites, high-polarization (Pr > 18 µC/cm2) ferroelectric switching is observed after rapid thermal annealing (RTA) at low temperature (350 °C). These results indicate the presence of minimal non-ferroelectric phases retained in the films after RTA when the ALD process forms nanocrystalline particles that seed subsequent formation of the polar orthorhombic phase.

Bending and precipitate formation mechanisms in epitaxial Ge-core/GeSn-shell nanowires.

Core-shell Ge/GeSn nanowires provide a route to dislocation-free single crystal germanium-tin alloys with desirable light emission properties because the Ge core acts as an elastically compliant substrate during misfitting GeSn shell growth. However, the uniformity of tin incorporation during reduced pressure chemical vapor deposition may be limited by the kinetics of mass transfer to the shell during GeSn growth. The balance between Sn precursor flux and available surfaces for GeSn nucleation and growth determines whether defects are formed and their type. On the one hand, when the Sn precursor delivery is insufficient, local variations in Sn arrival rate at the nanowire surfaces during GeSn growth produce asymmetries in shell growth that induce wire bending. This inhomogeneous elastic dilatation due to the varying composition occurs via deposition of Sn-poor regions on some of the {112} sidewall facets of the nanowires. On the other hand, when the available nanowire surface area is insufficient to accommodate the arriving Sn precursor flux, Sn-rich precipitate formation results. Between these two extremes, there exists a regime of growth conditions and nanowire densities that permits defect-free GeSn shell growth.

Link between Gas Phase Reaction Chemistry and the Electronic Conductivity of Atomic Layer Deposited Titanium Oxide Thin Films.

In situ monitoring of gas phase composition reveals the link between the changing gas phase chemistry during atomic layer deposition (ALD) half-cycle reactions and the electronic conductivity of ALD-TiO2 thin films. Dimethylamine ((CH3)2NH, DMA) is probed as the main product of both the TDMAT and water vapor half-reactions during the TDMAT/H2O ALD process. In-plane electronic transport characterization of the ALD grown films demonstrates that the presence of DMA, a reducing agent, in the ALD chamber throughout each half-cycle is correlated with both an increase in the films' electronic conductivity, and observation of titanium in the 3+ oxidation state by ex situ X-ray photoelectron spectroscopy analysis of the films. DMA annealing of as-grown TiO2 films in the ALD chamber produces a similar effect on their electronic characteristics, indicating the importance of DMA-induced oxygen deficiency of ALD-TiO2 in dictating the electronic conductivity of as-grown films.

In-situ reflectometry to monitor locally-catalyzed initiation and growth of nanowire assemblies.

We investigate in-situ laser reflectometry for measuring the axial growth rate in chemical vapor deposition of assemblies of well-aligned vertical germanium nanowires grown epitaxially on single crystal substrates. Finite difference frequency domain optical simulations were performed in order to facilitate quantitative analysis and interpretation of the measured reflectivity data. The results show an insensitivity of the reflected intensity oscillation period to nanowire diameter and density within the range of experimental conditions investigated. Compared to previous quantitative in-situ measurements performed on III-V nanowire arrays, which showed two distinct rate regimes, we observe a constant, steady-state nanowire growth rate. Furthermore, we show that the measured reflectivity decay can be used to determine the germanium nanowire nucleation time with good precision. This technique provides an avenue to monitor growth of nanowires in a variety of materials systems and growth conditions.

Understanding the Mechanism of Electronic Defect Suppression Enabled by Nonidealities in Atomic Layer Deposition.

Silicon germanium (SiGe) is a multifunctional material considered for quantum computing, neuromorphic devices, and CMOS transistors. However, implementation of SiGe in nanoscale electronic devices necessitates suppression of surface states dominating the electronic properties. The absence of a stable and passive surface oxide for SiGe results in the formation of charge traps at the SiGe-oxide interface induced by GeOx. In an ideal ALD process in which oxide is grown layer by layer, the GeOx formation should be prevented with selective surface oxidation (i.e., formation of an SiOx interface) by controlling the oxidant dose in the first few ALD cycles of the oxide deposition on SiGe. However, in a real ALD process, the interface evolves during the entire ALD oxide deposition due to diffusion of reactant species through the gate oxide. In this work, this diffusion process in nonideal ALD is investigated and exploited: the diffusion through the oxide during ALD is utilized to passivate the interfacial defects by employing ozone as a secondary oxidant. Periodic ozone exposure during gate oxide ALD on SiGe is shown to reduce the integrated trap density (Dit) across the band gap by nearly 1 order of magnitude in Al2O3 (<6 × 1010 cm-2) and in HfO2 (<3.9 × 1011 cm-2) by forming a SiOx-rich interface on SiGe. Depletion of Ge from the interfacial layer (IL) by enhancement of volatile GeOx formation and consequent desorption from the SiGe with ozone insertion during the ALD growth process is confirmed by electron energy loss spectroscopy (STEM-EELS) and hypothesized to be the mechanism for reduction of the interfacial defects. In this work, the nanoscale mechanism for defect suppression at the SiGe-oxide interface is demonstrated, which is engineering of diffusion species in the ALD process due to facile diffusion of reactant species in nonideal ALD.

Phase-field investigation of the stages in radial growth of core-shell Ge/Ge1-xSnx nanowires.

Core-shell Ge/Ge1-xSnx nanowires are considered promising silicon-compatible nanomaterials with the potential to achieve a direct band-gap for optoelectronic applications. In this study, we systematically investigated the formation of this heterostructure in the radial direction by the phase field method coupled with elasticity. Our model simulated the shell growth of the wire, capturing the evolution of both the sidewall morphology and the strain distribution. We predicted the minimum chemical potential driving forces required for initiating the Ge1-xSnx shell growth at given tin concentrations. In addition, we studied the dependences of the shell growth rate on the chemical potential, the tin concentration, the sidewall interface kinetics and the mass transport rate respectively. From these analyses, we identified three sequential stages of the growth: the Stage 1 growth at an accelerated rate, the Stage 2 growth at a constant rate, and finally the Stage 3 growth at a reduced rate scaling with . This research improves our current understanding on the growth mechanisms of heterogeneous core-shell nanowires, and provides useful guidelines for optimizing nanowire synthesis pathways.

Engineering High- k/SiGe Interface with ALD Oxide for Selective GeO x Reduction.

Suppression of electronic defects induced by GeO x at the high- k gate oxide/SiGe interface is critical for implementation of high-mobility SiGe channels in complementary metal-oxide-semiconductor (CMOS) technology. Theoretical and experimental studies have shown that a low defect density interface can be formed with an SiO x-rich interlayer on SiGe. Experimental studies in the literature indicate a better interface formation with Al2O3 in contrast to HfO2 on SiGe; however, the mechanism behind this is not well understood. In this study, the mechanism of forming a low defect density interface between Al2O3/SiGe is investigated using atomic layer deposited (ALD) Al2O3 insertion into or on top of ALD HfO2 gate oxides. To elucidate the mechanism, correlations are made between the defect density determined by impedance measurements and the chemical and physical structures of the interface determined by high-resolution scanning transmission electron microscopy and electron energy loss spectroscopy. The compositional analysis reveals an SiO x rich interlayer for both Al2O3/SiGe and HfO2/SiGe interfaces with the insertion of Al2O3 into or on top of the HfO2 oxide. The data is consistent with the Al2O3 insertion inducing decomposition of the GeO x from the interface to form an electrically passive, SiO x rich interface on SiGe. This mechanism shows that nanolaminate gate oxide chemistry cannot be interpreted as resulting from a simple layer-by-layer ideal ALD process, because the precursor or its reaction products can diffuse through the oxide during growth and react at the semiconductor interface. This result shows that in scaled CMOS, remote oxide ALD (oxide ALD on top of the gate oxide) can be used to suppress electronic defects at gate oxide semiconductor interfaces by oxygen scavenging.

Dynamic thermal emission control with InAs-based plasmonic metasurfaces.

Thermal emission from objects tends to be spectrally broadband, unpolarized, and temporally invariant. These common notions are now challenged with the emergence of new nanophotonic structures and concepts that afford on-demand, active manipulation of the thermal emission process. This opens a myriad of new applications in chemistry, health care, thermal management, imaging, sensing, and spectroscopy. Here, we theoretically propose and experimentally demonstrate a new approach to actively tailor thermal emission with a reflective, plasmonic metasurface in which the active material and reflector element are epitaxially grown, high-carrier-mobility InAs layers. Electrical gating induces changes in the charge carrier density of the active InAs layer that are translated into large changes in the optical absorption and thermal emission from metasurface. We demonstrate polarization-dependent and electrically controlled emissivity changes of 3.6%P (6.5% in relative scale) in the mid-infrared spectral range.

The Role of Catalyst Adhesion in ALD-TiO2 Protection of Water Splitting Silicon Anodes.

Atomic layer deposited titanium dioxide (ALD-TiO2) has emerged as an effective protection layer for highly efficient semiconductor anodes which are normally unstable under the potential and pH conditions used to oxidize water in a photoelectrochemical cell. The failure modes of silicon anodes coated with an Ir/IrO x oxygen evolution catalyst layer are investigated, and poor catalyst/substrate adhesion is found to be a key factor in failed anodes. Quantitative measurements of interfacial adhesion energy show that the addition of TiO2 significantly improves reliability of anodes, yielding an adhesion energy of 6.02 ± 0.5 J/m2, more than double the adhesion energy measured in the absence of an ALD-TiO2 protection layer. These results indicate the importance of catalyst adhesion to an interposed protection layer in promoting operational stability of high efficiency semiconducting anodes during solar-driven water splitting.

Ultralow Defect Density at Sub-0.5 nm HfO2/SiGe Interfaces via Selective Oxygen Scavenging.

The superior carrier mobility of SiGe alloys make them a highly desirable channel material in complementary metal-oxide-semiconductor (CMOS) transistors. Passivation of the SiGe surface and the associated minimization of interface defects between SiGe channels and high- k dielectrics continues to be a challenge for fabrication of high-performance SiGe CMOS. A primary source of interface defects is interfacial GeO x. This interfacial oxide can be decomposed using an oxygen-scavenging reactive gate metal, which nearly eliminates the interfacial oxides, thereby decreasing the amount of GeO x at the interface; the remaining ultrathin interlayer is consistent with a SiO x-rich interface. Density functional theory simulations demonstrate that a sub-0.5 nm thick SiO x-rich surface layer can produce an electrically passivated HfO2/SiGe interface. To form this SiO x-rich interlayer, metal gate stack designs including Al/HfO2/SiGe and Pd/Ti/TiN/nanolaminate (NL)/SiGe (NL: HfO2-Al2O3) were investigated. As compared to the control Ni-gated devices, those with Al/HfO2/SiGe gate stacks demonstrated more than an order of magnitude reduction in interface defect density with a sub-0.5 nm SiO x-rich interfacial layer. To further increase the oxide capacitance, the devices were fabricated with a Ti oxygen scavenging layer separated from the HfO2 by a conductive TiN diffusion barrier (remote scavenging). The Pd/Ti/TiN/NL/SiGe structures exhibited significant capacitance enhancement along with a reduction in interface defect density.

Thermal Stability of Mixed Cation Metal Halide Perovskites in Air.

We study the thermal stability in air of the mixed cation organic-inorganic lead halide perovskites Cs0.17FA0.83Pb(I0.83Br0.17)3 and Cs0.05(MA0.17FA0.83)0.95Pb(I0.83Br0.17)3. For the latter compound, containing both MA+ and FA+ ions, thermal decomposition of the perovskite phase was observed to occur in two stages. The first stage of decomposition occurs at a faster rate compared to the second stage and is only observed at relatively low temperatures (T < 150 °C). For the second stage, we find that both decomposition rate and the activation energy have similar values for Cs0.05(MA0.17FA0.83)0.95Pb(I0.83Br0.17)3 and Cs0.17FA0.83Pb(I0.83Br0.17)3, which suggests that the first stage mainly involves reaction of MA+ and the second stage mainly FA+.

Interfacial Cation-Defect Charge Dipoles in Stacked TiO2/Al2O3 Gate Dielectrics.

Layered atomic-layer-deposited and forming-gas-annealed TiO2/Al2O3 dielectric stacks, with the Al2O3 layer interposed between the TiO2 and a p-type germanium substrate, are found to exhibit a significant interface charge dipole that causes a ∼-0.2 V shift of the flat-band voltage and suppresses the leakage current density for gate injection of electrons. These effects can be eliminated by the formation of a trilayer dielectric stack, consistent with the cancellation of one TiO2/Al2O3 interface dipole by the addition of another dipole of opposite sign. Density functional theory calculations indicate that the observed interface-dependent properties of TiO2/Al2O3 dielectric stacks are consistent in sign and magnitude with the predicted behavior of AlTi and TiAl point-defect dipoles produced by local intermixing of the Al2O3/TiO2 layers across the interface. Evidence for such intermixing is found in both electrical and physical characterization of the gate stacks.

Contact Selectivity Engineering in a 2 µm Thick Ultrathin c-Si Solar Cell Using Transition-Metal Oxides Achieving an Efficiency of 10.8.

In this paper, the integration of metal oxides as carrier-selective contacts for ultrathin crystalline silicon (c-Si) solar cells is demonstrated which results in an ∼13% relative improvement in efficiency. The improvement in efficiency originates from the suppression of the contact recombination current due to the band offset asymmetry of these oxides with Si. First, an ultrathin c-Si solar cell having a total thickness of 2 µm is shown to have >10% efficiency without any light-trapping scheme. This is achieved by the integration of nickel oxide (NiOx) as a hole-selective contact interlayer material, which has a low valence band offset and high conduction band offset with Si. Second, we show a champion cell efficiency of 10.8% with the additional integration of titanium oxide (TiOx), a well-known material for an electron-selective contact interlayer. Key parameters including Voc and Jsc also show different degrees of enhancement if single (NiOx only) or double (both NiOx and TiOx) carrier-selective contacts are integrated. The fabrication process for TiOx and NiOx layer integration is scalable and shows good compatibility with the device.

Dielectric Breakdown in Chemical Vapor Deposited Hexagonal Boron Nitride.

Insulating films are essential in multiple electronic devices because they can provide essential functionalities, such as capacitance effects and electrical fields. Two-dimensional (2D) layered materials have superb electronic, physical, chemical, thermal, and optical properties, and they can be effectively used to provide additional performances, such as flexibility and transparency. 2D layered insulators are called to be essential in future electronic devices, but their reliability, degradation kinetics, and dielectric breakdown (BD) process are still not understood. In this work, the dielectric breakdown process of multilayer hexagonal boron nitride (h-BN) is analyzed on the nanoscale and on the device level, and the experimental results are studied via theoretical models. It is found that under electrical stress, local charge accumulation and charge trapping/detrapping are the onset mechanisms for dielectric BD formation. By means of conductive atomic force microscopy, the BD event was triggered at several locations on the surface of different dielectrics (SiO2, HfO2, Al2O3, multilayer h-BN, and monolayer h-BN); BD-induced hillocks rapidly appeared on the surface of all of them when the BD was reached, except in monolayer h-BN. The high thermal conductivity of h-BN combined with the one-atom-thick nature are genuine factors contributing to heat dissipation at the BD spot, which avoids self-accelerated and thermally driven catastrophic BD. These results point to monolayer h-BN as a sublime dielectric in terms of reliability, which may have important implications in future digital electronic devices.

Electrochemical impedance spectroscopy for quantitative interface state characterization of planar and nanostructured semiconductor-dielectric interfaces.

The performance of nanostructured semiconductors is frequently limited by interface defects that trap electronic carriers. In particular, high aspect ratio geometries dramatically increase the difficulty of using typical solid-state electrical measurements (multifrequency capacitance- and conductance-voltage testing) to quantify interface trap densities (D it). We report on electrochemical impedance spectroscopy (EIS) to characterize the energy distribution of interface traps at metal oxide/semiconductor interfaces. This method takes advantage of liquid electrolytes, which provide conformal electrical contacts. Planar Al2O3/p-Si and Al2O3/p-Si0.55Ge0.45 interfaces are used to benchmark the EIS data against results obtained from standard electrical testing methods. We find that the solid state and EIS data agree very well, leading to the extraction of consistent D it energy distributions. Measurements carried out on pyramid-nanostructured p-Si obtained by KOH etching followed by deposition of a 10 nm ALD-Al2O3 demonstrate the application of EIS to trap characterization of a nanostructured dielectric/semiconductor interface. These results show the promise of this methodology to measure interface state densities for a broad range of semiconductor nanostructures such as nanowires, nanofins, and porous structures.

Effects of H2 High-pressure Annealing on HfO2/Al2O3/In0.53Ga0.47As Capacitors: Chemical Composition and Electrical Characteristics.

We studied the impact of H2 pressure during post-metallization annealing on the chemical composition of a HfO2/Al2O3 gate stack on a HCl wet-cleaned In0.53Ga0.47As substrate by comparing the forming gas annealing (at atmospheric pressure with a H2 partial pressure of 0.04 bar) and H2 high-pressure annealing (H2-HPA at 30 bar) methods. In addition, the effectiveness of H2-HPA on the passivation of the interface states was compared for both p- and n-type In0.53Ga0.47As substrates. The decomposition of the interface oxide and the subsequent out-diffusion of In and Ga atoms toward the high-k film became more significant with increasing H2 pressure. Moreover, the increase in the H2 pressure significantly improved the capacitance‒voltage characteristics, and its effect was more pronounced on the p-type In0.53Ga0.47As substrate. However, the H2-HPA induced an increase in the leakage current, probably because of the out-diffusion and incorporation of In/Ga atoms within the high-k stack.

Distinguishing Oxygen Vacancy Electromigration and Conductive Filament Formation in TiO2 Resistance Switching Using Liquid Electrolyte Contacts.

Resistance switching in TiO2 and many other transition metal oxide resistive random access memory materials is believed to involve the assembly and breaking of interacting oxygen vacancy filaments via the combined effects of field-driven ion migration and local electronic conduction leading to Joule heating. These complex processes are very difficult to study directly in part because the filaments form between metallic electrode layers that block their observation by most characterization techniques. By replacing the top electrode layer in a metal-insulator-metal memory structure with easily removable liquid electrolytes, either an ionic liquid (IL) with high resistance contact or a conductive aqueous electrolyte, we probe field-driven oxygen vacancy redistribution in TiO2 thin films under conditions that either suppress or promote Joule heating. Oxygen isotope exchange experiments indicate that exchange of oxygen ions between TiO2 and the IL is facile at room temperature. Oxygen loss significantly increases the conductivity of the TiO2 films; however, filament formation is not observed after IL gating alone. Replacing the IL with a more conductive aqueous electrolyte contact and biasing does produce electroformed conductive filaments, consistent with a requirement for Joule heating to enhance the vacancy concentration and mobility at specific locations in the film.