RESUMEN
This paper proposes an artifact-suppressed stimulator with a referenced and tuned push-pull stimulation (RTPPS) scheme where a tri-polar electrode is employed. The stimulation pulses delivered to two working electrodes are complementary and thus one counteracts with the other to suppress the artifact at the recording site. The prototype stimulator chip is implemented in 0.18-µm CMOS process technology. In-vivo experiments are carried out with the chip to demonstrate the proposed artifact-suppression technique in a simultaneous neural recording and stimulation system. The results show that the stimulation artifact can be greatly reduced. The amplitude of the measured stimulation artifact is therefore constrained in a negligible level (10%-20%) compared to recorded neural spikes.
