RESUMEN
Crystalline ZrTiO4 (ZTO) in orthorhombic phase with different plasma treatments was explored as the charge-trapping layer for low-voltage operation flash memory. For ZTO without any plasma treatment, even with a high k value of 45.2, it almost cannot store charges due the oxygen vacancies-induced shallow-level traps that make charges easy to tunnel back to Si substrate. With CF4 plasma treatment, charge storage is still not improved even though incorporated F atoms could introduce additional traps since the F atoms disappear during the subsequent thermal annealing. On the contrary, nevertheless the k value degrades to 40.8, N2O plasma-treated ZTO shows promising performance in terms of 5-V hysteresis memory window by ±7-V sweeping voltage, 2.8-V flatband voltage shift by programming at +7 V for 100 µs, negligible memory window degradation with 105 program/erase cycles and 81.8% charge retention after 104 sec at 125 °C. These desirable characteristics are ascribed not only to passivation of oxygen vacancies-related shallow-level traps but to introduction of a large amount of deep-level bulk charge traps which have been proven by confirming thermally excited process as the charge loss mechanism and identifying traps located at energy level beneath ZTO conduction band by 0.84 eV~1.03 eV.
RESUMEN
With SnO typically regarded as a p-type oxide semiconductor, an oxide semiconductor formed by hybrid phases of mainly SnO and a small amount of SnO2 with an average [O]/[Sn] ratio of 1.1 was investigated as a channel material for n-type thin-film transistors (TFTs). Furthermore, an appropriate number of oxygen vacancies were introduced into the oxide during annealing at 400 °C in ambient N2, making both SnO and SnO2 favorable for current conduction. By using high-κ ZrO2 with a capacitance equivalent thickness of 13.5 nm as the gate dielectric, the TFTs processed at 400 °C demonstrated a steep subthreshold swing (SS) of 0.21 V/dec, and this can be ascribed to the large gate capacitance along with a low interface trap density (Dit) value of 5.16 × 10(11) cm(-2) eV(-1). In addition, the TFTs exhibit a relatively high electron mobility of 7.84 cm(2)/V·s, high ON/OFF current ratios of up to 2.5 × 10(5), and a low gate leakage current at a low operation voltage of 3 V. The TFTs also prove its high reliability performance by showing negligible degradation of SS and threshold voltage (VT) against high field stress (-10 MV/cm). When 3% oxygen annealing is combined with a thinner channel thickness, TFTs with even higher ION/IOFF ratios exceeding 10(7) can also be obtained. With these promising characteristics, the overall performance of the TFTs displays competitive advantages compared with other n-type TFTs formed on binary or even some multicomponent oxide semiconductors and paves a promising and economic avenue to implement an n-type oxide semiconductor without doping for production-worthy TFT technology. Most importantly, when combined with the typical SnO-based p-type oxide semiconductor, it would usher in a new era in achieving high-performance complementary metal oxide semiconductor circuits by using the same SnO-based oxide semiconductor.
RESUMEN
A stacked oxide semiconductor of n-type ZnO/p-type NiO with diode behavior was proposed as the novel charge-trapping layer to enable low-voltage flash memory for green electronics. The memory performance outperforms that of other devices with high κ and a nanocrystal-based charge-trapping layer in terms of a large hysteresis memory window of 2.02 V with ±3 V program/erase voltage, a high operation speed of 1.88 V threshold voltage shift by erasing at -4 V for 1 ms, negligible memory window degradation up to 10(5) operation cycles, and 16.2% charge loss after 10 years of operation at 85 °C. The promising electrical characteristics can be explained by the negative conduction band offset with respect to Si of ZnO that is beneficial to electron injection and storage, the large number of trapping sites of NiO that act as other good storage media, and most importantly the built-in electric field between n-type ZnO and p-type NiO that provides a favorable electric field for program and erase operation. The process of diode-based flash memory is fully compatible with incumbent VLSI technology, and utilization of the built-in electric field ushers in a new avenue of accomplishing green flash memory.
