Dirac-source diode with sub-unity ideality factor.

An increase in power consumption necessitates a low-power circuit technology to extend Moore's law. Low-power transistors, such as tunnel field-effect transistors (TFETs), negative-capacitance field-effect transistors (NC-FETs), and Dirac-source field-effect transistors (DS-FETs), have been realised to break the thermionic limit of the subthreshold swing (SS). However, a low-power rectifier, able to overcome the thermionic limit of an ideality factor (η) of 1 at room temperature, has not been proposed yet. In this study, we have realised a DS diode based on graphene/MoS2/graphite van der Waals heterostructures, which exhibits a steep-slope characteristic curve, by exploiting the linear density of states (DOSs) of graphene. For the developed DS diode, we obtained η < 1 for more than four decades of drain current (ηave_4dec < 1) with a minimum value of 0.8, and a rectifying ratio exceeding 108. The realisation of a DS diode represents an additional step towards the development of low-power electronic circuits.

Gate-Tunable Reversible Rashba-Edelstein Effect in a Few-Layer Graphene/2H-TaS2 Heterostructure at Room Temperature.

We report the observation of current-induced spin polarization, the Rashba-Edelstein effect (REE), and its Onsager reciprocal phenomenon, the spin galvanic effect (SGE), in a few-layer graphene/2H-TaS2 heterostructure at room temperature. Spin-sensitive electrical measurements unveil full spin-polarization reversal by an applied gate voltage. The observed gate-tunable charge-to-spin conversion is explained by the ideal work function mismatch between 2H-TaS2 and graphene, which allows for a strong interface-induced Bychkov-Rashba interaction with a spin-gap reaching 70 meV, while keeping the Dirac nature of the spectrum intact across electron and hole sectors. The reversible electrical generation and control of the nonequilibrium spin polarization vector, not previously observed in a nonmagnetic material, are elegant manifestations of emergent two-dimensional Dirac Fermions with robust spin-helical structure. Our experimental findings, supported by first-principles relativistic electronic structure and transport calculations, demonstrate a route to design low-power spin-logic circuits from layered materials.

Thickness-controlled black phosphorus tunnel field-effect transistor for low-power switches.

The continuous down-scaling of transistors has been the key to the successful development of current information technology. However, with Moore's law reaching its limits, the development of alternative transistor architectures is urgently needed1. Transistors require a switching voltage of at least 60 mV for each tenfold increase in current, that is, a subthreshold swing (SS) of 60 mV per decade (dec). Alternative tunnel field-effect transistors (TFETs) are widely studied to achieve a sub-thermionic SS and high I60 (the current where SS becomes 60 mV dec-1)2. Heterojunction (HJ) TFETs show promise for delivering a high I60, but experimental results do not meet theoretical expectations due to interface problems in the HJs constructed from different materials. Here, we report a natural HJ-TFET with spatially varying layer thickness in black phosphorus without interface problems. We have achieved record-low average SS values over 4-5 dec of current (SSave_4dec ~22.9 mV dec-1 and SSave_5dec ~26.0 mV dec-1) with record-high I60 (I60 = 0.65-1 µA µm-1), paving the way for application in low-power switches.