A steep-switching impact ionization-based threshold switching field-effect transistor.

A steep switching device with a low subthreshold swing (SS) that overcomes the fundamental Boltzmann limit (kT/q) is required to efficiently process a continuously increasing amount of data. Recently, two-dimensional material-based impact ionization transistors with various structures have been reported with the advantages of a low critical electric field and a unique quantum confinement effect. However, most of them cannot retain steep switching at room temperature, and device performance degradation issues caused by impact ionization-induced hot carriers have not been structurally addressed. In this study, we presented an impact-ionization-based threshold switching field-effect transistor (I2S-FET) fabricated with a serial connection of a MoS2 FET and WSe2 impact ionization-based threshold switch (I2S). We obtained repetitive operation with low SS (32.8 mV dec-1) at room temperature, along with low dielectric injection efficiency (10-6), through a structural design with separation of the conducting region, which determines on-state carrier transport, and the steep-switching region where the transition from off- to on-state occurs via impact ionization. Furthermore, compared to previously reported threshold-switching devices, our device demonstrated hysteresis-free switching characteristics. This study provides a promising approach for developing next-generation energy-efficient electronic devices and ultralow-power applications.

A steep switching WSe2 impact ionization field-effect transistor.

The Fermi-Dirac distribution of carriers and the drift-diffusion mode of transport represent two fundamental barriers towards the reduction of the subthreshold slope (SS) and the optimization of the energy consumption of field-effect transistors. In this study, we report the realization of steep-slope impact ionization field-effect transistors (I2FETs) based on a gate-controlled homogeneous WSe2 lateral junction. The devices showed average SS down to 2.73 mV/dec over three decades of source-drain current and an on/off ratio of ~106 at room temperature and low bias voltages (<1 V). We determined that the lucky-drift mechanism of carriers is valid in WSe2, allowing our I2FETs to have high impact ionization coefficients and low SS at room temperature. Moreover, we fabricated a logic inverter based on a WSe2 I2FET and a MoS2 FET, exhibiting an inverter gain of 73 and almost ideal noise margin for high- and low-logic states. Our results provide a promising approach for developing functional devices as front runners for energy-efficient electronic device technology.

Complementary Driving between 2D Heterostructures and Surface Functionalization for Surpassing Binary Logic Devices.

Recently, for overcoming the fundamental limits of conventional silicon technology, multivalued logic (MVL) circuits based on two-dimensional (2D) materials have received significant attention for reducing the power consumption and the complexity of integrated circuits. Compared with the conventional silicon complementary metal oxide semiconductor technology, new functional heterostructures comprising 2D materials can be readily implemented, owing to their unique inherent electrical properties. Furthermore, their process integration does not pose issues of lattice mismatch at junction interfaces. This facilitates the realization of new functional logic gate circuit configurations. However, the reported three-valued NOT gates (ternary inverters) based on 2D materials require stringent operating conditions and complex fabrication processes to obtain three distinct logic states. Herein, a general structure of MVL devices based on a simple series connection of 2D materials with partial surface functionalization is demonstrated. By arranging three 2D materials exhibiting p-type, ambipolar, and n-type conductivities, ternary inverter circuits can be established based on the complementary driving between 2D heterotransistors. This ternary inverter circuit can be further improved for quaternary inverter circuits by controlling the charge neutral point of partial ambipolar 2D materials using surface functionalization, which is an effective and nondestructive doping method for 2D materials.

High performance bi-layer atomic switching devices.

Atomic switches, also known as conductive bridging random access memory devices, are resistive-switching devices that utilize the electrochemical reactions within a solid electrolyte between metal electrodes, and are considered essential components of future information storage and logic building blocks. In spite of their advantages as next generation switching components such as high density, large scalability, and low power consumption, the large deviations in their electrical properties and the instability of their switching behaviors hinder their application in information processing systems. Here, we report the fabrication of a uniform, low-power atomic switch with a bi-layer structure consisting of Ta2O5-x as the main switching layer (SL) and a relatively oxygen-deficient TaOx as an oxygen vacancy control layer (VCL). The depth profiles of the filaments in the bi-layer device were obtained by performing conductive atomic force microscopy to assess the improvements in uniformity, reliability, and electrical performance that result from the insertion of the VCL. The coefficient of variation of the high resistance state of the bi-layer device was found to be drastically reduced from 60.92% to 2.77% in the cycle-to-cycle measurements and from 82.73% to 4.85% in the device-to-device measurements when compared with the values obtained for a single-layer device. The bi-layer device also exhibits a forming-free low operation voltage of ∼0.4 V, a high on/off ratio of ∼106, and high reliability with 10 years data retention at 85 °C.