High-Performance Organic Source-Gated Transistors Enabled by the Indium-Tin Oxide-Diketopyrrolopyrrole Polymer Interface.

Source-gated transistors are a new driver of low-power high-gain thin-film electronics. However, source-gated transistors based on organic semiconductors are not widely investigated yet despite their potential for future display and sensor technologies. We report on the fabrication and modeling of high-performance organic source-gated transistors utilizing a critical junction formed between indium-tin oxide and diketopyrrolopyrrole polymer. This partially blocked hole-injection interface is shown to offer both a sufficient level of drain currents and a strong depletion effect necessary for source pinch-off. As a result, our transistors exhibit a set of outstanding metrics, including an intrinsic gain of 160 V/V, an output resistance of 4.6 GΩ, and a saturation coefficient of 0.2 at an operating voltage of 5 V. Drift-diffusion simulation is employed to reproduce and rationalize the experimental data. The modeling reveals that the effective contact length is significantly reduced in an interdigitated electrode geometry, eventually contributing to the realization of low-voltage saturation.

N-Type Printed Organic Source-Gated Transistors with High Intrinsic Gain.

Source-gated transistors (SGTs) are emerging devices enabling high-gain single-stage amplifiers with low complexity. To date, the p-type printed organic SGT (OSGT) has been developed and showed high gain and low power consumption. However, complementary OSGT circuits remained impossible because of the lack of n-type OSGTs. Here, we show the first n-type OSGTs, which are printed and have a high intrinsic gain over 40. A Schottky source contact is intentionally formed between an n-type organic semiconductor, poly{[N,N'-bis(2-octyldodecyl)naphthalene-1,4,5,8-bis(dicarboximide)-2,6-diyl]-alt-5,5'-(2,2'-bithiophene)} (N2200), and the silver electrode. In addition, a blocking layer at the edge of the source electrode plays an important role to improve the saturation characteristics and increase the intrinsic gain. Such n-type printed OSGTs and complementary circuits based on them are promising for flexible and wearable electronic devices such as for physiological and biochemical health monitoring.

Multimodal transistors as ReLU activation functions in physical neural network classifiers.

Artificial neural networks (ANNs) providing sophisticated, power-efficient classification are finding their way into thin-film electronics. Thin-film technologies require robust, layout-efficient devices with facile manufacturability. Here, we show how the multimodal transistor's (MMT's) transfer characteristic, with linear dependence in saturation, replicates the rectified linear unit (ReLU) activation function of convolutional ANNs (CNNs). Using MATLAB, we evaluate CNN performance using systematically distorted ReLU functions, then substitute measured and simulated MMT transfer characteristics as proxies for ReLU. High classification accuracy is maintained, despite large variations in geometrical and electrical parameters, as CNNs use the same activation functions for training and classification.

Novel Tunnel-Contact-Controlled IGZO Thin-Film Transistors with High Tolerance to Geometrical Variability.

Thin insulating layers are used to modulate a depletion region at the source of a thin-film transistor. Bottom contact, staggered-electrode indium gallium zinc oxide transistors with a 3 nm Al2 O3 layer between the semiconductor and Ni source/drain contacts, show behaviors typical of source-gated transistors (SGTs): low saturation voltage (VD_SAT ≈ 3 V), change in VD_SAT with a gate voltage of only 0.12 V V-1 , and flat saturated output characteristics (small dependence of drain current on drain voltage). The transistors show high tolerance to geometry: the saturated current changes only 0.15× for 2-50 µm channels and 2× for 9-45 µm source-gate overlaps. A higher than expected (5×) increase in drain current for a 30 K change in temperature, similar to Schottky-contact SGTs, underlines a more complex device operation than previously theorized. Optimization for increasing intrinsic gain and reducing temperature effects is discussed. These devices complete the portfolio of contact-controlled transistors, comprising devices with Schottky contacts, bulk barrier, or heterojunctions, and now, tunneling insulating layers. The findings should also apply to nanowire transistors, leading to new low-power, robust design approaches as large-scale fabrication techniques with sub-nanometer control mature.

Towards manufacturing high uniformity polysilicon circuits through TFT contact barrier engineering.

The predicted 50 billion devices connected to the Internet of Things by 2020 has renewed interest in polysilicon technology for high performance new sensing and control circuits, in addition to traditional display usage. Yet, the polycrystalline nature of the material presents significant challenges when used in transistors with strongly scaled channel lengths due to non-uniformity in device performance. For these new applications to materialize as viable products, uniform electrical characteristics on large areas will be essential. Here, we report on the effect of deliberately engineered potential barrier at the source of polysilicon thin-film transistors, yielding highly-uniform on-current (<8% device-to-device, accounting for material, as well as substantial geometrical, variations). The contact-controlled architecture of these transistors significantly reduces kink effect and produces high intrinsic gain over a wide range of drain voltage (2-20 V). TCAD simulations associate critical grain boundary position and the two current injection mechanisms in this type of device, showing that, for the geometry considered, the most unfavorable location is ~150 nm inside the source area. At this point, grain boundary contributes to increasing the resistance of the source pinch-off region, reducing the current injection from the bulk of the source area. Nevertheless, the effect is marginal, and the probability of a grain boundary existing at this position is low. This new understanding is instrumental in the design of new signal conversion and gain circuits for flexible and low-power sensors, without the need for complex compensation methods.

High efficiency air stable organic photovoltaics with an aqueous inorganic contact.

We report a ZnO interfacial layer based on an environmentally friendly aqueous precursor for organic photovoltaics. Inverted PCDTBT devices based on this precursor show power conversion efficiencies of 6.8-7%. Unencapsulated devices stored in air display prolonged lifetimes extending over 200 hours with less than 20% drop in efficiency compared to devices based on the standard architecture.