Nonvolatile Control of Valley Polarized Emission in 2D WSe2-AlScN Heterostructures.

Achieving robust and electrically controlled valley polarization in monolayer transition metal dichalcogenides (ML-TMDs) is a frontier challenge for realistic valleytronic applications. Theoretical investigations show that the integration of 2D materials with ferroelectrics is a promising strategy; however, an experimental demonstration has remained elusive. Here, we fabricate ferroelectric field-effect transistors using a ML-WSe2 channel and an Al0.68Sc0.32N (AlScN) ferroelectric dielectric and experimentally demonstrate efficient tuning as well as non-volatile control of valley polarization. We measure a large array of transistors and obtain a maximum valley polarization of ∼27% at 80 K with stable retention up to 5400 s. The enhancement in the valley polarization is ascribed to the efficient exciton-to-trion (X-T) conversion and its coupling with an out-of-plane electric field, viz., the quantum-confined Stark effect. This changes the valley depolarization pathway from strong exchange interactions to slow spin-flip intervalley scattering. Our research demonstrates a promising approach for achieving non-volatile control over valley polarization for practical valleytronic device applications.

Tuning Polarity in WSe2/AlScN FeFETs via Contact Engineering.

Recent advancements in ferroelectric field-effect transistors (FeFETs) using two-dimensional (2D) semiconductor channels and ferroelectric Al0.68Sc0.32N (AlScN) allow high-performance nonvolatile devices with exceptional ON-state currents, large ON/OFF current ratios, and large memory windows (MW). However, previous studies have solely focused on n-type FeFETs, leaving a crucial gap in the development of p-type and ambipolar FeFETs, which are essential for expanding their applicability to a wide range of circuit-level applications. Here, we present a comprehensive demonstration of n-type, p-type, and ambipolar FeFETs on an array scale using AlScN and multilayer/monolayer WSe2. The dominant injected carrier type is modulated through contact engineering at the metal-semiconductor junction, resulting in the realization of all three types of FeFETs. The effect of contact engineering on the carrier injection is further investigated through technology-computer-aided design simulations. Moreover, our 2D WSe2/AlScN FeFETs achieve high electron and hole current densities of ∼20 and ∼10 µA/µm, respectively, with a high ON/OFF ratio surpassing ∼107 and a large MW of >6 V (0.14 V/nm).

Three-dimensional integration of two-dimensional field-effect transistors.

In the field of semiconductors, three-dimensional (3D) integration not only enables packaging of more devices per unit area, referred to as 'More Moore'1 but also introduces multifunctionalities for 'More than Moore'2 technologies. Although silicon-based 3D integrated circuits are commercially available3-5, there is limited effort on 3D integration of emerging nanomaterials6,7 such as two-dimensional (2D) materials despite their unique functionalities7-10. Here we demonstrate (1) wafer-scale and monolithic two-tier 3D integration based on MoS2 with more than 10,000 field-effect transistors (FETs) in each tier; (2) three-tier 3D integration based on both MoS2 and WSe2 with about 500 FETs in each tier; and (3) two-tier 3D integration based on 200 scaled MoS2 FETs (channel length, LCH = 45 nm) in each tier. We also realize a 3D circuit and demonstrate multifunctional capabilities, including sensing and storage. We believe that our demonstrations will serve as the foundation for more sophisticated, highly dense and functionally divergent integrated circuits with a larger number of tiers integrated monolithically in the third dimension.

Low-Frequency Raman Study of Large-Area Twisted Bilayers of WS2 Stacked by an Etchant-Free Transfer Method.

Monolayer transition metal dichalcogenides have strong intracovalent bonding. When stacked in multilayers, however, weak van der Waals interactions dominate interlayer mechanical coupling and, thus, influence their lattice vibrations. This study presents the frequency evolution of interlayer phonons in twisted WS2 bilayers, highly subject to the twist angle. The twist angle between the layers is controlled to modulate the spacing between the layers, which, in turn, affects the interlayer coupling that is probed by Raman spectroscopy. The shifts of high-frequency E2g1 (Γ) and A1g (Γ) phonon modes and their frequency separations are dependent on the twist angle, reflecting the correlation between the interlayer mechanical coupling and twist angle. In this work, we fabricated large-area, twisted bilayer WS2 with a clean interface with controlled twist angles. Polarized Raman spectroscopy identified new interlayer modes, which were not previously reported, depending on the twist angle. The appearance of breathing modes in Raman phonon spectra provides evidence of strong interlayer coupling in bilayer structures. We confirm that the twist angle can alter the exciton and trion dynamics of bilayers as indicated by the photoluminescence peak shift. These large-area controlled twist angle samples have practical applications in optoelectronic device fabrication and twistronics.

A Peripheral-Free True Random Number Generator Based on Integrated Circuits Enabled by Atomically Thin Two-Dimensional Materials.

A true random number generator (TRNG) is essential to ensure information security for Internet of Things (IoT) edge devices. While pseudorandom number generators (PRNGs) have been instrumental, their deterministic nature limits their application in security-sensitive scenarios. In contrast, hardware-based TRNGs derived from physically unpredictable processes offer greater reliability. This study demonstrates a peripheral-free TRNG utilizing two cascaded three-stage inverters (TSIs) in conjunction with an XOR gate composed of monolayer molybdenum disulfide (MoS2) field-effect transistors (FETs) by exploiting the stochastic charge trapping and detrapping phenomena at and/or near the MoS2/dielectric interface. The entropy source passes the NIST SP800-90B tests with a minimum normalized entropy of 0.8780, while the generated bits pass the NIST SP800-22 randomness tests without any postprocessing. Moreover, the keys generated using these random bits are uncorrelated with near-ideal entropy, bit uniformity, and Hamming distances, exhibiting resilience against machine learning (ML) attacks, temperature variations, and supply bias fluctuations with a frugal energy expenditure of 30 pJ/bit. This approach offers an advantageous alternative to conventional silicon, memristive, and nanomaterial-based TRNGs as it obviates the need for extensive peripherals while harnessing the potential of atomically thin 2D materials in developing low-power TRNGs.

Step engineering for nucleation and domain orientation control in WSe2 epitaxy on c-plane sapphire.

Epitaxial growth of two-dimensional transition metal dichalcogenides on sapphire has emerged as a promising route to wafer-scale single-crystal films. Steps on the sapphire act as sites for transition metal dichalcogenide nucleation and can impart a preferred domain orientation, resulting in a substantial reduction in mirror twins. Here we demonstrate control of both the nucleation site and unidirectional growth direction of WSe2 on c-plane sapphire by metal-organic chemical vapour deposition. The unidirectional orientation is found to be intimately tied to growth conditions via changes in the sapphire surface chemistry that control the step edge location of WSe2 nucleation, imparting either a 0° or 60° orientation relative to the underlying sapphire lattice. The results provide insight into the role of surface chemistry on transition metal dichalcogenide nucleation and domain alignment and demonstrate the ability to engineer domain orientation over wafer-scale substrates.

Radiation Resilient Two-Dimensional Electronics.

Limitations in cloud-based computing have prompted a paradigm shift toward all-in-one "edge" devices capable of independent data sensing, computing, and storage. Advanced defense and space applications stand to benefit immensely from this due to their need for continual operation in areas where maintaining remote oversight is difficult. However, the extreme environments relevant to these applications necessitate rigorous testing of technologies, with a common requirement being hardness to ionizing radiation. Two-dimensional (2D) molybdenum disulfide (MoS2) has been noted to enable the sensing, storage, and logic capabilities necessary for all-in-one edge devices. Despite this, the investigation of ionizing radiation effects in MoS2-based devices remains incomplete. In particular, studies on gamma radiation effects in MoS2 have been largely limited to standalone films, with few device investigations; to the best of our knowledge, no explorations have been made into gamma radiation effects on the sensing and memory capabilities of MoS2-based devices. In this work, we have used a statistical approach to study high-dose (1 Mrad) gamma radiation effects on photosensitive and programmable memtransistors fabricated from large-area monolayer MoS2. Memtransistors were divided into separate groups to ensure accurate extraction of device characteristics pertaining to baseline performance, sensing, and memory before and after irradiation. All-MoS2 logic gates were also assessed to determine the gamma irradiation impact on logic implementation. Our findings show that the multiple functionalities of MoS2 memtransistors are not severely impacted by gamma irradiation even without dedicated shielding/mitigation techniques. We believe that these results serve as a foundation for more application-oriented studies going forward.

Scalable CMOS back-end-of-line-compatible AlScN/two-dimensional channel ferroelectric field-effect transistors.

Three-dimensional monolithic integration of memory devices with logic transistors is a frontier challenge in computer hardware. This integration is essential for augmenting computational power concurrent with enhanced energy efficiency in big data applications such as artificial intelligence. Despite decades of efforts, there remains an urgent need for reliable, compact, fast, energy-efficient and scalable memory devices. Ferroelectric field-effect transistors (FE-FETs) are a promising candidate, but requisite scalability and performance in a back-end-of-line process have proven challenging. Here we present back-end-of-line-compatible FE-FETs using two-dimensional MoS2 channels and AlScN ferroelectric materials, all grown via wafer-scalable processes. A large array of FE-FETs with memory windows larger than 7.8 V, ON/OFF ratios greater than 107 and ON-current density greater than 250 µA um-1, all at ~80 nm channel length are demonstrated. The FE-FETs show stable retention up to 10 years by extension, and endurance greater than 104 cycles in addition to 4-bit pulse-programmable memory features, thereby opening a path towards the three-dimensional heterointegration of a two-dimensional semiconductor memory with silicon complementary metal-oxide-semiconductor logic.

A Monolithic Stochastic Computing Architecture for Energy Efficient Arithmetic.

As the energy and hardware investments necessary for conventional high-precision digital computing continue to explode in the era of artificial intelligence (AI), a change in paradigm that can trade precision for energy and resource efficiency is being sought for many computing applications. Stochastic computing (SC) is an attractive alternative since, unlike digital computers, which require many logic gates and a high transistor volume to perform basic arithmetic operations such as addition, subtraction, multiplication, sorting, etc., SC can implement the same using simple logic gates. While it is possible to accelerate SC using traditional silicon complementary metal-oxide-semiconductor (CMOS) technology, the need for extensive hardware investment to generate stochastic bits (s-bits), the fundamental computing primitive for SC, makes it less attractive. Memristor and spin-based devices offer natural randomness but depend on hybrid designs involving CMOS peripherals for accelerating SC, which increases area and energy burden. Here, the limitations of existing and emerging technologies are overcome, and a standalone SC architecture embedded in memory and based on 2D memtransistors is experimentally demonstrated. The monolithic and non-von-Neumann SC architecture occupies a small hardware footprint and consumes a miniscule amount of energy (<1 nJ) for both s-bit generation and arithmetic operations, highlighting the benefits of SC.

Active pixel sensor matrix based on monolayer MoS2 phototransistor array.

In-sensor processing, which can reduce the energy and hardware burden for many machine vision applications, is currently lacking in state-of-the-art active pixel sensor (APS) technology. Photosensitive and semiconducting two-dimensional (2D) materials can bridge this technology gap by integrating image capture (sense) and image processing (compute) capabilities in a single device. Here, we introduce a 2D APS technology based on a monolayer MoS2 phototransistor array, where each pixel uses a single programmable phototransistor, leading to a substantial reduction in footprint (900 pixels in ∼0.09 cm2) and energy consumption (100s of fJ per pixel). By exploiting gate-tunable persistent photoconductivity, we achieve a responsivity of ∼3.6 × 107 A W-1, specific detectivity of ∼5.6 × 1013 Jones, spectral uniformity, a high dynamic range of ∼80 dB and in-sensor de-noising capabilities. Further, we demonstrate near-ideal yield and uniformity in photoresponse across the 2D APS array.

Two-dimensional materials-based probabilistic synapses and reconfigurable neurons for measuring inference uncertainty using Bayesian neural networks.

Artificial neural networks have demonstrated superiority over traditional computing architectures in tasks such as pattern classification and learning. However, they do not measure uncertainty in predictions, and hence they can make wrong predictions with high confidence, which can be detrimental for many mission-critical applications. In contrast, Bayesian neural networks (BNNs) naturally include such uncertainty in their model, as the weights are represented by probability distributions (e.g. Gaussian distribution). Here we introduce three-terminal memtransistors based on two-dimensional (2D) materials, which can emulate both probabilistic synapses as well as reconfigurable neurons. The cycle-to-cycle variation in the programming of the 2D memtransistor is exploited to achieve Gaussian random number generator-based synapses, whereas 2D memtransistor based integrated circuits are used to obtain neurons with hyperbolic tangent and sigmoid activation functions. Finally, memtransistor-based synapses and neurons are combined in a crossbar array architecture to realize a BNN accelerator for a data classification task.

Bioinspired and Low-Power 2D Machine Vision with Adaptive Machine Learning and Forgetting.

Natural intelligence has many dimensions, with some of its most important manifestations being tied to learning about the environment and making behavioral changes. In primates, vision plays a critical role in learning. The underlying biological neural networks contain specialized neurons and synapses which not only sense and process visual stimuli but also learn and adapt with remarkable energy efficiency. Forgetting also plays an active role in learning. Mimicking the adaptive neurobiological mechanisms for seeing, learning, and forgetting can, therefore, accelerate the development of artificial intelligence (AI) and bridge the massive energy gap that exists between AI and biological intelligence. Here, we demonstrate a bioinspired machine vision system based on a 2D phototransistor array fabricated from large-area monolayer molybdenum disulfide (MoS2) and integrated with an analog, nonvolatile, and programmable memory gate-stack; this architecture not only enables dynamic learning and relearning from visual stimuli but also offers learning adaptability under noisy illumination conditions at miniscule energy expenditure. In short, our demonstrated "all-in-one" hardware vision platform combines "sensing", "computing", and "storage" to not only overcome the von Neumann bottleneck of conventional complementary metal-oxide-semiconductor (CMOS) technology but also to eliminate the need for peripheral circuits and sensors.

Hardware implementation of Bayesian network based on two-dimensional memtransistors.

Bayesian networks (BNs) find widespread application in many real-world probabilistic problems including diagnostics, forecasting, computer vision, etc. The basic computing primitive for BNs is a stochastic bit (s-bit) generator that can control the probability of obtaining '1' in a binary bit-stream. While silicon-based complementary metal-oxide-semiconductor (CMOS) technology can be used for hardware implementation of BNs, the lack of inherent stochasticity makes it area and energy inefficient. On the other hand, memristors and spintronic devices offer inherent stochasticity but lack computing ability beyond simple vector matrix multiplication due to their two-terminal nature and rely on extensive CMOS peripherals for BN implementation, which limits area and energy efficiency. Here, we circumvent these challenges by introducing a hardware platform based on 2D memtransistors. First, we experimentally demonstrate a low-power and compact s-bit generator circuit that exploits cycle-to-cycle fluctuation in the post-programmed conductance state of 2D memtransistors. Next, the s-bit generators are monolithically integrated with 2D memtransistor-based logic gates to implement BNs. Our findings highlight the potential for 2D memtransistor-based integrated circuits for non-von Neumann computing applications.

Heterogeneous Integration of Atomically Thin Semiconductors for Non-von Neumann CMOS.

Atomically thin, 2D, and semiconducting transition metal dichalcogenides (TMDs) are seen as potential candidates for complementary metal oxide semiconductor (CMOS) technology in future nodes. While high-performance field effect transistors (FETs), logic gates, and integrated circuits (ICs) made from n-type TMDs such as MoS2 and WS2 grown at wafer scale have been demonstrated, realizing CMOS electronics necessitates integration of large area p-type semiconductors. Furthermore, the physical separation of memory and logic is a bottleneck of the existing CMOS technology and must be overcome to reduce the energy burden for computation. In this article, the existing limitations are overcome and for the first time, a heterogeneous integration of large area grown n-type MoS2 and p-type vanadium doped WSe2 FETs with non-volatile and analog memory storage capabilities to achieve a non-von Neumann 2D CMOS platform is introduced. This manufacturing process flow allows for precise positioning of n-type and p-type FETs, which is critical for any IC development. Inverters and a simplified 2-input-1-output multiplexers and neuromorphic computing primitives such as Gaussian, sigmoid, and tanh activation functions using this non-von Neumann 2D CMOS platform are also demonstrated. This demonstration shows the feasibility of heterogeneous integration of wafer scale 2D materials.

All-in-one, bio-inspired, and low-power crypto engines for near-sensor security based on two-dimensional memtransistors.

In the emerging era of the internet of things (IoT), ubiquitous sensors continuously collect, consume, store, and communicate a huge volume of information which is becoming increasingly vulnerable to theft and misuse. Modern software cryptosystems require extensive computational infrastructure for implementing ciphering algorithms, making them difficult to be adopted by IoT edge sensors that operate with limited hardware resources and at low energy budgets. Here we propose and experimentally demonstrate an "all-in-one" 8 × 8 array of robust, low-power, and bio-inspired crypto engines monolithically integrated with IoT edge sensors based on two-dimensional (2D) memtransistors. Each engine comprises five 2D memtransistors to accomplish sensing and encoding functionalities. The ciphered information is shown to be secure from an eavesdropper with finite resources and access to deep neural networks. Our hardware platform consists of a total of 320 fully integrated monolayer MoS2-based memtransistors and consumes energy in the range of hundreds of picojoules and offers near-sensor security.

High-Density, Localized Quantum Emitters in Strained 2D Semiconductors.

Two-dimensional chalcogenide semiconductors have recently emerged as a host material for quantum emitters of single photons. While several reports on defect- and strain-induced single-photon emission from 2D chalcogenides exist, a bottom-up, lithography-free approach to producing a high density of emitters remains elusive. Further, the physical properties of quantum emission in the case of strained 2D semiconductors are far from being understood. Here, we demonstrate a bottom-up, scalable, and lithography-free approach for creating large areas of localized emitters with high density (∼150 emitters/um2) in a WSe2 monolayer. We induce strain inside the WSe2 monolayer with high spatial density by conformally placing the WSe2 monolayer over a uniform array of Pt nanoparticles with a size of 10 nm. Cryogenic, time-resolved, and gate-tunable luminescence measurements combined with near-field luminescence spectroscopy suggest the formation of localized states in strained regions that emit single photons with a high spatial density. Our approach of using a metal nanoparticle array to generate a high density of strained quantum emitters will be applied to scalable, tunable, and versatile quantum light sources.

Wafer-Scale Epitaxial Growth of Unidirectional WS2 Monolayers on Sapphire.

Realization of wafer-scale single-crystal films of transition metal dichalcogenides (TMDs) such as WS2 requires epitaxial growth and coalescence of oriented domains to form a continuous monolayer. The domains must be oriented in the same crystallographic direction on the substrate to inhibit the formation of inversion domain boundaries (IDBs), which are a common feature of layered chalcogenides. Here we demonstrate fully coalesced unidirectional WS2 monolayers on 2 in. diameter c-plane sapphire by metalorganic chemical vapor deposition using a multistep growth process to achieve epitaxial WS2 monolayers with low in-plane rotational twist (0.09°). Transmission electron microscopy analysis reveals that the WS2 monolayers are largely free of IDBs but instead have translational boundaries that arise when WS2 domains with slightly offset lattices merge together. By regulating the monolayer growth rate, the density of translational boundaries and bilayer coverage were significantly reduced. The unidirectional orientation of domains is attributed to the presence of steps on the sapphire surface coupled with growth conditions that promote surface diffusion, lateral domain growth, and coalescence while preserving the aligned domain structure. The transferred WS2 monolayers show neutral and charged exciton emission at 80 K with negligible defect-related luminescence. Back-gated WS2 field effect transistors exhibited an ION/OFF of ∼107 and mobility of 16 cm2/(V s). The results demonstrate the potential of achieving wafer-scale TMD monolayers free of inversion domains with properties approaching those of exfoliated flakes.