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Research on MEMS Solid-State Fuse Logic Control Chip Based on Electrical Explosion Effect.
Su, Wenting; Lou, Wenzhong; Feng, Hengzhen; Zhao, Yuecen; Lv, Sining; Kan, Wenxing; He, Bo.
Afiliación
  • Su W; Science and Technology on Electromechanical Dynamic Control Laboratory, School of Mechatronical Engineering, Beijing Institute of Technology, Beijing 100081, China.
  • Lou W; Science and Technology on Electromechanical Dynamic Control Laboratory, School of Mechatronical Engineering, Beijing Institute of Technology, Beijing 100081, China.
  • Feng H; Science and Technology on Electromechanical Dynamic Control Laboratory, School of Mechatronical Engineering, Beijing Institute of Technology, Beijing 100081, China.
  • Zhao Y; National Key Laboratory of Science and Technology on Micro/Nano Fabrication, Shanghai Jiao Tong University, Shanghai 200240, China.
  • Lv S; School of Electronic Information and Electrical Engineering, Shanghai Jiao Tong University, Dong Chuan Road 800, Shanghai 200240, China.
  • Kan W; Science and Technology on Electromechanical Dynamic Control Laboratory, School of Mechatronical Engineering, Beijing Institute of Technology, Beijing 100081, China.
  • He B; Science and Technology on Electromechanical Dynamic Control Laboratory, School of Mechatronical Engineering, Beijing Institute of Technology, Beijing 100081, China.
Micromachines (Basel) ; 14(3)2023 Mar 21.
Article en En | MEDLINE | ID: mdl-36985102
A microelectromechanical systems (MEMS) solid-state logic control chip with three layers-diversion layer, control layer, and substrate layer-is designed to satisfy fuse miniaturization and integration requirements. A mathematical model is established according to the heat conduction equation, and the limit conditions of different structures are presented. The finite element multi-physical field simulation method is used to simulate the size and the action voltage of the diversion layer of the control chip. Based on the surface silicon process, fuse processing, and testing with the MEMS solid-state fuse-logic control chip, a diversion layer constant current, maximum current resistance test, and a control layer of different bridge area sizes, the bridge area size is 200 × 30 µm, and the minimum electrical explosion voltage is 23.6 V. The theoretical calculation results at 20 V and 100 µF demonstrate that the capacitor energy is insufficient to support the complete vaporization of the bridge area, but can be partially vaporized, consistent with the experimental results.
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Texto completo: 1 Colección: 01-internacional Base de datos: MEDLINE Idioma: En Revista: Micromachines (Basel) Año: 2023 Tipo del documento: Article País de afiliación: China

Texto completo: 1 Colección: 01-internacional Base de datos: MEDLINE Idioma: En Revista: Micromachines (Basel) Año: 2023 Tipo del documento: Article País de afiliación: China
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