RESUMO
Spike-timing-dependent plasticity (STDP) is a fundamental synaptic learning rule observed in biology that leads to numerous behavioral and cognitive outcomes. Emulating STDP in electronic spiking neural networks with high-density memristive synapses is, therefore, of significant interest. While one popular method involves pulse-shaping the spiking neuron output voltages, an alternative approach is outlined in this article. The proposed STDP implementation uses time-varying dynamic resistance [ R ( t )] elements to achieve local synaptic learning from spike-pair STDP, spike triplet STDP, and firing rates. The R ( t ) elements are connected to each neuron circuit, thereby maintaining synaptic density and leveraging voltage division as a means of altering synaptic weight (memristor voltage). Example R ( t ) elements with their corresponding behaviors are demonstrated through simulation. A three-input-two-output network using single-memristor synaptic connections and R ( t ) elements is also simulated. Network-level effects, such as nonspecific synaptic plasticity, are discussed. Finally, spatiotemporal pattern recognition (STPR) using R ( t ) elements is demonstrated in simulation.
RESUMO
This study demonstrates the growth and differentiation of C2C12 myoblasts into functional myotubes on 3-dimensional graphene foam bioscaffolds. Specifically, we establish both bare and laminin coated graphene foam as a biocompatible platform for muscle cells and identify that electrical coupling stimulates cell activity. Cell differentiation and functionality is determined by the expression of myotube heavy chain protein and Ca2+ fluorescence, respectively. Further, our data show that the application of a pulsed electrical stimulus to the graphene foam initiates myotube contraction and subsequent localized substrate movement of over 100 micrometers. These findings will further the development of advanced 3-dimensional graphene platforms for therapeutic applications and tissue engineering.
RESUMO
Spiking neuron circuits consisting of ambipolar nanocrystalline-silicon (nc-Si) thin-film transistors (TFTs) have been fabricated using low temperature processing conditions (maximum of 250 °C) that allow the use of flexible substrates. These circuits display behaviors commonly observed in biological neurons such as millisecond spike duration, nonlinear frequency-current relationship, and spike frequency adaptation. The maximum drive capacity of a simple soma circuit was estimated to be approximately 9200 synapses. The effect of bias stress-induced threshold voltage degradation of component nc-Si TFTs on the spike frequency of soma circuits is explored. The measured power consumption of the circuit when spiking at 100 Hz was approximately 12 nW. Finally, the power consumption of the soma circuits at different spiking conditions and its implications on a large-scale system are discussed. The fabricated circuits can be employed as part of a compact multilayer learning network.
RESUMO
Properties of neural circuits are demonstrated via SPICE simulations and their applications are discussed. The neuron and synapse subcircuits include ambipolar nano-crystalline silicon transistor and memristor device models based on measured data. Neuron circuit characteristics and the Hebbian synaptic learning rule are shown to be similar to biology. Changes in the average firing rate learning rule depending on various circuit parameters are also presented. The subcircuits are then connected into larger neural networks that demonstrate fundamental properties including associative learning and pulse coincidence detection. Learned extraction of a fundamental frequency component from noisy inputs is demonstrated. It is then shown that if the fundamental sinusoid of one neuron input is out of phase with the rest, its synaptic connection changes differently than the others. Such behavior indicates that the system can learn to detect which signals are important in the general population, and that there is a spike-timing-dependent component of the learning mechanism. Finally, future circuit design and considerations are discussed, including requirements for the memristive device.