Programming memristor arrays with arbitrarily high precision for analog computing.

In-memory computing represents an effective method for modeling complex physical systems that are typically challenging for conventional computing architectures but has been hindered by issues such as reading noise and writing variability that restrict scalability, accuracy, and precision in high-performance computations. We propose and demonstrate a circuit architecture and programming protocol that converts the analog computing result to digital at the last step and enables low-precision analog devices to perform high-precision computing. We use a weighted sum of multiple devices to represent one number, in which subsequently programmed devices are used to compensate for preceding programming errors. With a memristor system-on-chip, we experimentally demonstrate high-precision solutions for multiple scientific computing tasks while maintaining a substantial power efficiency advantage over conventional digital approaches.

Reconfigurable Stochastic neurons based on tin oxide/MoS2 hetero-memristors for simulated annealing and the Boltzmann machine.

Neuromorphic hardware implementation of Boltzmann Machine using a network of stochastic neurons can allow non-deterministic polynomial-time (NP) hard combinatorial optimization problems to be efficiently solved. Efficient implementation of such Boltzmann Machine with simulated annealing desires the statistical parameters of the stochastic neurons to be dynamically tunable, however, there has been limited research on stochastic semiconductor devices with controllable statistical distributions. Here, we demonstrate a reconfigurable tin oxide (SnOx)/molybdenum disulfide (MoS2) heterogeneous memristive device that can realize tunable stochastic dynamics in its output sampling characteristics. The device can sample exponential-class sigmoidal distributions analogous to the Fermi-Dirac distribution of physical systems with quantitatively defined tunable "temperature" effect. A BM composed of these tunable stochastic neuron devices, which can enable simulated annealing with designed "cooling" strategies, is conducted to solve the MAX-SAT, a representative in NP-hard combinatorial optimization problems. Quantitative insights into the effect of different "cooling" strategies on improving the BM optimization process efficiency are also provided.

CMOS High-Voltage Analog 1-64 Multiplexer/Demultiplexer for Integrated Ultrasound Guided Breast Needle Biopsy.

Ultrasound guided needle biopsy is an important method for collection of breast cancer tissue. In this paper, we report on the design and testing of a high-voltage 1 to 64 Multiplexer/Demultiplexer (MUX/De-MUX) integrated circuit (IC) for ultrasound-guided breast biopsy applications implemented in a high-voltage CMOS process. The IC is intended to be incorporated inside the breast biopsy needle and is designed to fit inside the needle inner diameter of 2.38 mm. The MUX/De-MUX electronics are made up of three parts, including a low-voltage 6 to 64 decoder, a level shifter to convert from low voltage to high voltage, and analog high-voltage switches. Experimental results show a -3-dB bandwidth of over 70 MHz, Rds (on) of , -2.279-dB insertion loss, and -17.5-dB off isolation at 70 MHz with low-voltage input. Finally, we present results obtained via synthetic aperture imaging using the fabricated MUX/De-Mux device and a high-frequency ultrasound array. This device and technique hold promise for high-frequency imaging probes where a limited number of elements are used and the depth of penetration is short such as in breast biopsy and intravascular applications.