Analog Memory and Synaptic Plasticity in an InGaZnO-Based Memristor by Modifying Intrinsic Oxygen Vacancies.

This study focuses on InGaZnO-based synaptic devices fabricated using reactive radiofrequency sputtering deposition with highly uniform and reliable multilevel memory states. Electron trapping and trap generation behaviors were examined based on current compliance adjustments and constant voltage stressing on the ITO/InGaZnO/ITO memristor. Using O2 + N2 plasma treatment resulted in stable and consistent cycle-to-cycle memory switching with an average memory window of ~95.3. Multilevel resistance states ranging from 0.68 to 140.7 kΩ were achieved by controlling the VRESET within the range of -1.4 to -1.8 V. The modulation of synaptic weight for short-term plasticity was simulated by applying voltage pulses with increasing amplitudes after the formation of a weak conductive filament. To emulate several synaptic behaviors in InGaZnO-based memristors, variations in the pulse interval were used for paired-pulse facilitation and pulse frequency-dependent spike rate-dependent plasticity. Long-term potentiation and depression are also observed after strong conductive filaments form at higher current compliance in the switching layer. Hence, the ITO/InGaZnO/ITO memristor holds promise for high-performance synaptic device applications.

Uniform multilevel switching and synaptic properties in RF-sputtered InGaZnO-based memristor treated with oxygen plasma.

Bipolar gradual resistive switching was investigated in ITO/InGaZnO/ITO resistive switching devices. Controlled intrinsic oxygen vacancy formation inside the switching layer enabled the establishment of a stable multilevel memory state, allowing for RESET voltage control and non-degradable data endurance. The ITO/InGaZnO interface governs the migration of oxygen ions and redox reactions within the switching layer. Voltage-stress-induced electron trapping and oxygen vacancy formation were observed before conductive filament electroforming. This device mimicked biological synapses, demonstrating short- and long-term potentiation and depression through electrical pulse sequences. Modulation of post-synaptic currents and pulse frequency-dependent short-term potentiation were successfully emulated in the InGaZnO-based artificial synapse. The ITO/InGaZnO/ITO memristor exhibited spike-amplitude-dependent plasticity, spike-rate-dependent plasticity, and potentiation-depression synaptic learning with low energy consumption, making it a promising candidate for large-scale integration.

The Enhanced Performance of Neuromorphic Computing Hardware in an ITO/ZnO/HfOx/W Bilayer-Structured Memory Device.

This study discusses the potential application of ITO/ZnO/HfOx/W bilayer-structured memory devices in neuromorphic systems. These devices exhibit uniform resistive switching characteristics and demonstrate favorable endurance (>102) and stable retention (>104 s). Notably, the formation and rupture of filaments at the interface of ZnO and HfOx contribute to a higher ON/OFF ratio and improve cycle uniformity compared to RRAM devices without the HfOx layer. Additionally, the linearity of potentiation and depression responses validates their applicability in neural network pattern recognition, and spike-timing-dependent plasticity (STDP) behavior is observed. These findings collectively suggest that the ITO/ZnO/HfOx/W structure holds the potential to be a viable memory component for integration into neuromorphic systems.

Correction: Synaptic plasticity and non-volatile memory characteristics in TiN-nanocrystal-embedded 3D vertical memristor-based synapses for neuromorphic systems.

Correction for 'Synaptic plasticity and non-volatile memory characteristics in TiN-nanocrystal-embedded 3D vertical memristor-based synapses for neuromorphic systems' by Seyeong Yang et al., Nanoscale, 2023, https://doi.org/10.1039/D3NR01930F.

Synaptic plasticity and non-volatile memory characteristics in TiN-nanocrystal-embedded 3D vertical memristor-based synapses for neuromorphic systems.

Although vertical configurations for high-density storage require challenging process steps, such as etching high aspect ratios and atomic layer deposition (ALD), they are more affordable with a relatively simple lithography process and have been employed in many studies. Herein, the potential of memristors with CMOS-compatible 3D vertical stacked structures of Pt/Ti/HfOx/TiN-NCs/HfOx/TiN is examined for use in neuromorphic systems. The electrical characteristics (including I-V properties, retention, and endurance) were investigated for both planar single cells and vertical resistive random-access memory (VRRAM) cells at each layer, demonstrating their outstanding non-volatile memory capabilities. In addition, various synaptic functions (including potentiation and depression) under different pulse schemes, excitatory postsynaptic current (EPSC), and spike-timing-dependent plasticity (STDP) were investigated. In pattern recognition simulations, an improved recognition rate was achieved by the linearly changing conductance, which was enhanced by the incremental pulse scheme. The achieved results demonstrated the feasibility of employing VRRAM with TiN nanocrystals in neuromorphic systems that resemble the human brain.

Short-Term Memory Characteristics of IGZO-Based Three-Terminal Devices.

A three-terminal synaptic transistor enables more accurate controllability over the conductance compared with traditional two-terminal synaptic devices for the synaptic devices in hardware-oriented neuromorphic systems. In this work, we fabricated IGZO-based three-terminal devices comprising HfAlOx and CeOx layers to demonstrate the synaptic operations. The chemical compositions and thicknesses of the devices were verified by transmission electron microscopy and energy dispersive spectroscopy in cooperation. The excitatory post-synaptic current (EPSC), paired-pulse facilitation (PPF), short-term potentiation (STP), and short-term depression (STD) of the synaptic devices were realized for the short-term memory behaviors. The IGZO-based three-terminal synaptic transistor could thus be controlled appropriately by the amplitude, width, and interval time of the pulses for implementing the neuromorphic systems.

Facile Synthesis of Biocarbon-Based MoS2 Composite for High-Performance Supercapacitor Application.

Nanocomposites are gaining high demand for the development of next-generation energy storage devices because of their eco-friendly and cost-effective natures. However, their short-term energy retainability and marginal stability are regarded as hindrances to overcome. In this work, we demonstrate a high-performance supercapacitor fabricated by biocarbon-based MoS2 (Bio-C/MoS2) nanoparticles synthesized by a facile hydrothermal approach using date fruits. Here, we report the high specific capacitance for a carbon-based nanocomposite employing the pyrolysis technique of converting agricultural biowaste into a highly affordable energy resource. The biocompatible Bio-C/MoS2 nanospheres exhibited a high capacitance of 945 F g-1 at a current density of 0.5 A g-1 and an excellent reproducing stability of 92% after 10000 charge/discharge cycles. In addition, the Bio-C/MoS2 NS showed an exceptional power density of 3800-8000 W kg-1 and an energy density of 74.9-157 Wh kg-1. The results would pave a new strategy for design of eco-friendly materials toward the high-performance energy storage technology.

Medium-Temperature-Oxidized GeOx Resistive-Switching Random-Access Memory and Its Applicability in Processing-in-Memory Computing.

Processing-in-memory (PIM) is emerging as a new computing paradigm to replace the existing von Neumann computer architecture for data-intensive processing. For the higher end-user mobility, low-power operation capability is more increasingly required and components need to be renovated to make a way out of the conventional software-driven artificial intelligence. In this work, we investigate the hardware performances of PIM architecture that can be presumably constructed by resistive-switching random-access memory (ReRAM) synapse fabricated with a relatively larger thermal budget in the full Si processing compatibility. By introducing a medium-temperature oxidation in which the sputtered Ge atoms are oxidized at a relatively higher temperature compared with the ReRAM devices fabricated by physical vapor deposition at room temperature, higher device reliability has been acquired. Based on the empirically obtained device parameters, a PIM architecture has been conceived and a system-level evaluations have been performed in this work. Considerations include the cycle-to-cycle variation in the GeOx ReRAM synapse, analog-to-digital converter resolution, synaptic array size, and interconnect latency for the system-level evaluation with the Canadian Institute for Advance Research-10 dataset. A fully Si processing-compatible and robust ReRAM synapse and its applicability for PIM are demonstrated.

Optimization of Feedback FET with Asymmetric Source Drain Doping Profile.

A feedback field-effect transistor (FBFET) is a novel device that uses a positive feedback mechanism. FBFET has a high on-/off ratio and is expected to realize ideal switching characteristics through steep changes from off-state to on-state. In this paper, we propose and optimize FBFET devices with asymmetric source/drain doping concentrations. Additionally, we discuss the changes in electrical characteristics across various channel length and channel thickness conditions and compare them with those of FBFET with a symmetric source/drain. This shows that FBFET with an asymmetric source/drain has a higher on-/off ratio than FBFET with a symmetric source/drain.

Novel Au nanorod/Cu2O composite nanoparticles for a high-performance supercapacitor.

Metal-oxide nanomaterials have attracted great interest in recent years due to their novel characteristics such as surface effect and quantum confinement. A fascinating Au nanorod (NR)/cuprous oxide core-shell composite (AuNR/Cu2O) was directly synthesized using a moderate one-pot facile green redox method and further utilized for energy storage applications in a supercapacitor. The synthesis mechanism is based on the use of reducing agents to form the core shell. The resultant composite was deposited on the surface of nickel foam as a result of redox reactions between Au and Cu via a hydrothermal method. AuNR/Cu2O composite nanoparticles (NPs) were characterized using various spectroscopic and microscopic techniques, including UV-vis and X-ray photoelectron spectroscopies, Brunauer-Emmett-Teller surface area analysis, X-ray diffractometry, and transmission electron microscopy. The AuNR/Cu2O composite NPs grow via the depositing of a 20-50 nm Cu2O shell on an AuNR core with dimensions of 5-20 nm in width and 40-70 nm in length. The as-synthesized AuNR/Cu2O composite NPs were effectively used as electrode materials in a supercapacitor, and their electrochemical performance was determined by cyclic voltammetry, galvanostatic charge-discharge measurements, and electrochemical impedance spectroscopy in 2 M KOH aqueous solution as an electrolyte. The composite NPs showed excellent average specific capacitance of 235 F g-1 at a current density of 2 A g-1 and durable cycling stability (96% even after 10 000 cycles). The higher efficiency of the AuNR/Cu2O composite NPs can be attributed to the presence of AuNR in the core. The AuNR/Cu2O composite NPs exhibit a high surface area and high electrical conductivity, which consequently result in their excellent specific capacitance and outstanding rate as an all-solid-state supercapacitor electrode.

Emulation of synaptic functions with low voltage organic memtransistor for hardware oriented neuromorphic computing.

Here, various synaptic functions and neural network simulation based pattern-recognition using novel, solution-processed organic memtransistors (memTs) with an unconventional redox-gating mechanism are demonstrated. Our synaptic memT device using conjugated polymer thin-film and redox-active solid electrolyte as the gate dielectric can be routinely operated at gate voltages (VGS) below - 1.5 V, subthreshold-swings (S) smaller than 120 mV/dec, and ON/OFF current ratio larger than 108. Large hysteresis in transfer curves depicts the signature of non-volatile resistive switching (RS) property with ON/OFF ratio as high as 105. In addition, our memT device also shows many synaptic functions, including the availability of many conducting-states (> 500) that are used for efficient pattern recognition using the simplest neural network simulation model with training and test accuracy higher than 90%. Overall, the presented approach opens a new and promising way to fabricate high-performance artificial synapses and their arrays for the implementation of hardware-oriented neural network.

Analytically and empirically consistent characterization of the resistive switching mechanism in a Ag conducting-bridge random-access memory device through a pseudo-liquid interpretation approach.

A new physical analysis of the filament formation in a Ag conducting-bridge random-access memory (CBRAM) device in consideration of the existence of inter-atomic attractions caused by metal bonding is suggested. The movement of Ag atoms inside the switching layer is characterized hydrodynamically using the Young-Laplace equation during set and reset operations. Both meridional and azimuthal curvatures of the Ag filament protruding from the Ag electrode are accurately calculated to track down the exact shape of the Ag filament with change in the applied voltage. The second-order partial differential equation for the Ag filament geometry is derived from the equation of equilibrium between the electrostatic pressure and the Laplace one. The solution to the equation is numerically obtained, and furthermore, the abrupt set operation in the forming process, bipolar resistive-switching, and the threshold switching operation in the reset operations are successfully simulated in accordance with the numerical solutions. Also, it is demonstrated that the currents extracted from the suggested model show good agreement with the I-V characteristics measured from the fabricated Ag CBRAM device.

Core-Shell Dual-Gate Nanowire Charge-Trap Memory for Synaptic Operations for Neuromorphic Applications.

This work showcases the physical insights of a core-shell dual-gate (CSDG) nanowire transistor as an artificial synaptic device with short/long-term potentiation and long-term depression (LTD) operation. Short-term potentiation (STP) is a temporary potentiation of a neural network, and it can be transformed into long-term potentiation (LTP) through repetitive stimulus. In this work, floating body effects and charge trapping are utilized to show the transition from STP to LTP while de-trapping the holes from the nitride layer shows the LTD operation. Furthermore, linearity and symmetry in conductance are achieved through optimal device design and biases. In a system-level simulation, with CSDG nanowire transistor a recognition accuracy of up to 92.28% is obtained in the Modified National Institute of Standards and Technology (MNIST) pattern recognition task. Complementary metal-oxide-semiconductor (CMOS) compatibility and high recognition accuracy makes the CSDG nanowire transistor a promising candidate for the implementation of neuromorphic hardware.

Process Steps for High Quality Si-Based Epitaxial Growth at Low Temperature via RPCVD.

The key process steps for growing high-quality Si-based epitaxial films via reduced pressure chemical vapor deposition (RPCVD) are investigated herein. The quality of the epitaxial films is largely affected by the following steps in the epitaxy process: ex-situ cleaning, in-situ bake, and loading conditions such as the temperature and gaseous environment. With respect to ex-situ cleaning, dry cleaning is found to be more effective than wet cleaning in 1:200 dilute hydrofluoric acid (DHF), while wet cleaning in 1:30 DHF is the least effective. However, the best results of all are obtained via a combination of wet and dry cleaning. With respect to in-situ hydrogen bake in the presence of H2 gas, the level of impurities is gradually decreased as the temperature increases from 700 °C to a maximum of 850 °C, at which no peaks of O and F are observed. Further, the addition of a hydrogen chloride (HCl) bake step after the H2 bake results in effective in-situ bake even at temperatures as low as 700 °C. In addition, the effects of temperature and environment (vacuum or gas) at the time of loading the wafers into the process chamber are compared. Better quality epitaxial films are obtained when the samples are loaded into the process chamber at low temperature in a gaseous environment. These results indicate that the epitaxial conditions must be carefully tuned and controlled in order to achieve high-quality epitaxial growth.

Recent Advances in Electrical Doping of 2D Semiconductor Materials: Methods, Analyses, and Applications.

Two-dimensional materials have garnered interest from the perspectives of physics, materials, and applied electronics owing to their outstanding physical and chemical properties. Advances in exfoliation and synthesis technologies have enabled preparation and electrical characterization of various atomically thin films of semiconductor transition metal dichalcogenides (TMDs). Their two-dimensional structures and electromagnetic spectra coupled to bandgaps in the visible region indicate their suitability for digital electronics and optoelectronics. To further expand the potential applications of these two-dimensional semiconductor materials, technologies capable of precisely controlling the electrical properties of the material are essential. Doping has been traditionally used to effectively change the electrical and electronic properties of materials through relatively simple processes. To change the electrical properties, substances that can donate or remove electrons are added. Doping of atomically thin two-dimensional semiconductor materials is similar to that used for silicon but has a slightly different mechanism. Three main methods with different characteristics and slightly different principles are generally used. This review presents an overview of various advanced doping techniques based on the substitutional, chemical, and charge transfer molecular doping strategies of graphene and TMDs, which are the representative 2D semiconductor materials.

Charge Based Current-Voltage Model for the Silicon on Insulator Junctionless Field-Effect Transistor.

In this study, we propose an accurate and simple current-voltage model for an SOI-JLFET based on a solution of the Poisson equation. The model is divided into three regions: accumulation, accumulation-depletion, and depletion. The charge density in each region is calculated with the Poisson equation and region-specific boundary conditions, and then the current is obtained by integrating the charge density with consideration of the Vds effect. The proposed model, which was implemented in HSPICE using Verilog-A, was validated using TCAD simulation for various physical conditions such as SOI channel thickness, gate oxide thickness, and channel doping concentration type. According to simulation results by the error rate calculation, our model shows more than 90% accuracy.

Analysis of the Sensing Margin of Silicon and Poly-Si 1T-DRAM.

Recently, one-transistor dynamic random-access memory (1T-DRAM) cells having a polysilicon body (poly-Si 1T-DRAM) have attracted attention as candidates to replace conventional one-transistor one-capacitor dynamic random-access memory (1T-1C DRAM). Poly-Si 1T-DRAM enables the cost-effective implementation of a silicon-on-insulator (SOI) structure and a three-dimensional (3D) stacked architecture for increasing integration density. However, studies on the transient characteristics of poly-Si 1T-DRAM are still lacking. In this paper, with TCAD simulation, we examine the differences between the memory mechanisms in poly-Si and silicon body 1T-DRAM. A silicon 1T-DRAM cell's data state is determined by the number of holes stored in a floating body (FB), while a poly-Si 1T-DRAM cell's state depends on the number of electrons trapped in its grain boundary (GB). This means that a poly-Si 1T-DRAM can perform memory operations by using GB as a storage region in thin body devices with a small FB area.

Ultrasensitive MoS2 photodetector by serial nano-bridge multi-heterojunction.

The recent reports of various photodetectors based on molybdenum disulfide (MoS2) field effect transistors showed that it was difficult to obtain optoelectronic performances in the broad detection range [visible-infrared (IR)] applicable to various fields. Here, by forming a mono-/multi-layer nano-bridge multi-heterojunction structure (more than > 300 junctions with 25 nm intervals) through the selective layer control of multi-layer MoS2, a photodetector with ultrasensitive optoelectronic performances in a broad spectral range (photoresponsivity of 2.67 × 106 A/W at λ = 520 nm and 1.65 × 104 A/W at λ = 1064 nm) superior to the previously reported MoS2-based photodetectors could be successfully fabricated. The nano-bridge multi-heterojunction is believed to be an important device technology that can be applied to broadband light sensing, highly sensitive fluorescence imaging, ultrasensitive biomedical diagnostics, and ultrafast optoelectronic integrated circuits through the formation of a nanoscale serial multi-heterojunction, just by adding a selective layer control process.

Design Optimization and Analysis of InGaAs/InAs/InGaAs Heterojunction-Based Electron Hole Bilayer Tunneling FETs.

In this study, we have designed and analyzed the electron-hole bilayer (EHB) tunneling field-effect transistors (TFETs) based on various III-V compound semiconductor materials using two-dimensional (2-D) technology computer-aided design (TCAD) simulations. A recently proposed EHB TFET has lower subthreshold swing (S) and higher on-state current (Ion) than the conventional planar TFET, using band-to-band tunneling (BTBT) across the source-to-channel junction. It uses a bias-induced BTBT across the EHB formed by an electric field between the two gates. The III-V compound semiconductors have been applied to the EHB TFETs to improve the switching performances and current drivability owing to their superior material properties such as high electron mobility and high tunneling probability. After the design and analysis of devices based on various compound semiconductors, in terms of primary DC characteristics, a lower bandgap material (InAs) has been inserted in the tunneling region of the In0.53Ga0.47As EHB TFET to enhance the tunneling rate. This paper proposes an EHB TFET that uses vertically stacked InGaAs/InAs/InGaAs layers. Moreover, the design optimization process has been performed via simulations. The simulation results of the proposed EHB TFET show remarkable performances with Ion of 739.6 µA/µm, S of 1.9 mV/dec, and threshold voltage (Vth) of 7 mV at VDS 0.5 V.

Design and Characterization of Semi-Floating-Gate Synaptic Transistor.

In this work, a study on a semi-floating-gate synaptic transistor (SFGST) is performed to verify its feasibility in the more energy-efficient hardware-driven neuromorphic system. To realize short- and long-term potentiation (STP/LTP) in the SFGST, a poly-Si semi-floating gate (SFG) and a SiN charge-trap layer are utilized, respectively. When an adequate number of holes are accumulated in the SFG, they are injected into the nitride charge-trap layer by the Fowler⁻Nordheim tunneling mechanism. Moreover, since the SFG is charged by an embedded tunneling field-effect transistor existing between the channel and the drain junction when the post-synaptic spike occurs after the pre-synaptic spike, and vice versa, the SFG is discharged by the diode when the post-synaptic spike takes place before the pre-synaptic spike. This indicates that the SFGST can attain STP/LTP and spike-timing-dependent plasticity behaviors. These characteristics of the SFGST in the highly miniaturized transistor structure can contribute to the neuromorphic chip such that the total system may operate as fast as the human brain with low power consumption and high integration density.