Out-of-Plane Electronics on Flexible Substrates Using Inorganic Nanowires Grown on High-Aspect-Ratio Printed Gold Micropillars.

Out-of-plane or 3D electronics on flexible substrates are an interesting direction that can enable novel solutions such as efficient bioelectricity generation and artificial retina. However, the development of devices with such architectures is limited by the lack of suitable fabrication techniques. Additive manufacturing (AM) can but often fail to provide high-resolution, sub-micrometer 3D architectures. Herein, the optimization of a drop-on-demand (DoD), high-resolution electrohydrodynamic (EHD)-based jet printing method for generating 3D gold (Au) micropillars is reported. Libraries of Au micropillar electrode arrays (MEAs) reaching a maximum height of 196 µm and a maximum aspect ratio of 52 are printed. Further, by combining AM with the hydrothermal growth method, a seedless synthesis of zinc oxide (ZnO) nanowires (NWs) on the printed Au MEAs is demonstrated. The developed hybrid approach leads to hierarchical light-sensitive NW-connected networks exhibiting favorable ultraviolet (UV) sensing as demonstrated via fabricating flexible photodetectors (PDs). The 3D PDs exhibit an excellent omnidirectional light-absorption ability and thus, maintain high photocurrents over wide light incidence angles (±90°). Lastly, the PDs are tested under both concave and convex bending at 40 mm, showing excellent mechanical flexibility.

Printed n- and p-Channel Transistors using Silicon Nanoribbons Enduring Electrical, Thermal, and Mechanical Stress.

Printing technologies are changing the face of electronics with features such as resource-efficiency, low-cost, and novel form factors. While significant advances have been made in terms of organic electronics, the high-performance and stable transistors by printing, and their large-scale integration leading to fast integrated circuits remains a major challenge. This is because of the difficulties to print high-mobility semiconducting materials and the lack of high-resolution printing techniques. Herein, we present silicon based printed n- and p-channel transistors to demonstrate the possibility of developing high-performance complementary metal-oxide-semiconductor (CMOS) computing architecture. The direct roll transfer printing is used here for deterministic assembly of high-mobility single crystal silicon nanoribbons arrays on a flexible polyimide substrate. This is followed by high-resolution electrohydrodynamic printing to define source/drain/gate electrodes and to encapsulate, thus leading to printed devices. The printed transistors show effective peak mobilities of 15 cm2/(V s) (n-channel) and 5 cm2/(V s) (p-channel) at low 1 V drain bias. Furthermore, the effect of electrical, mechanical, and thermal stress on the performance and stability of the encapsulated transistors is investigated. The transistors showed stable transfer characteristics even after: (i) continuous 4000 transfer cycles, (ii) excruciating 10000 bending cycles at different bending radii (40, 25, and 15 mm), and (iii) between 15 and 60 °C temperatures.

Skin-Inspired Thermoreceptors-Based Electronic Skin for Biomimicking Thermal Pain Reflexes.

Electronic systems possessing skin-like morphology and functionalities (electronic skins [e-skins]) have attracted considerable attention in recent years to provide sensory or haptic feedback in growing areas such as robotics, prosthetics, and interactive systems. However, the main focus thus far has been on the distributed pressure or force sensors. Herein a thermoreceptive e-skin with biological systems like functionality is presented. The soft, distributed, and highly sensitive miniaturized (≈700 µm2 ) artificial thermoreceptors (ATRs) in the e-skin are developed using an innovative fabrication route that involves dielectrophoretic assembly of oriented vanadium pentoxide nanowires at defined locations and high-resolution electrohydrodynamic printing. Inspired from the skin morphology, the ATRs are embedded in a thermally insulating soft nanosilica/epoxy polymeric layer and yet they exhibit excellent thermal sensitivity (-1.1 ± 0.3% °C-1 ), fast response (≈1s), exceptional stability (negligible hysteresis for >5 h operation), and mechanical durability (up to 10 000 bending and twisting loading cycles). Finally, the developed e-skin is integrated on the fingertip of a robotic hand and a biological system like reflex is demonstrated in response to temperature stimuli via localized learning at the hardware level.

High-performance printed electronics based on inorganic semiconducting nano to chip scale structures.

The Printed Electronics (PE) is expected to revolutionise the way electronics will be manufactured in the future. Building on the achievements of the traditional printing industry, and the recent advances in flexible electronics and digital technologies, PE may even substitute the conventional silicon-based electronics if the performance of printed devices and circuits can be at par with silicon-based devices. In this regard, the inorganic semiconducting materials-based approaches have opened new avenues as printed nano (e.g. nanowires (NWs), nanoribbons (NRs) etc.), micro (e.g. microwires (MWs)) and chip (e.g. ultra-thin chips (UTCs)) scale structures from these materials have been shown to have performances at par with silicon-based electronics. This paper reviews the developments related to inorganic semiconducting materials based high-performance large area PE, particularly using the two routes i.e. Contact Printing (CP) and Transfer Printing (TP). The detailed survey of these technologies for large area PE onto various unconventional substrates (e.g. plastic, paper etc.) is presented along with some examples of electronic devices and circuit developed with printed NWs, NRs and UTCs. Finally, we discuss the opportunities offered by PE, and the technical challenges and viable solutions for the integration of inorganic functional materials into large areas, 3D layouts for high throughput, and industrial-scale manufacturing using printing technologies.

Fabrication of high performance field-effect transistors and practical Schottky contacts using hydrothermal ZnO nanowires.

The production of large quantities of single crystalline semiconducting ZnO nanowires (NWs) at low cost can offer practical solutions to realizing several novel electronic/optoelectronic and sensor applications on an industrial scale. The present work demonstrates high-density single crystalline NWs synthesized by a multiple cycle hydrothermal process at ∼100 °C. The high carrier concentration in such ZnO NWs is greatly suppressed by a simple low cost thermal annealing step in ambient air at ∼450 °C. Single ZnO NW FETs incorporating these modified NWs are characterized, revealing strong metal work function-dependent charge transport, unobtainable with as-grown hydrothermal ZnO NWs. Single ZnO NW FETs with Al as source and drain (s/d) contacts show excellent performance metrics, including low off-state currents (fA range), high on/off ratio (10(5)-10(7)), steep subthreshold slope (<600 mV/dec) and excellent field-effect carrier mobility (5-11 cm(2)/V-s). Modified ZnO NWs with platinum s/d contacts demonstrate excellent Schottky transport characteristics, markedly different from a reference ZnO NW device with Al contacts. This included abrupt reverse bias current-voltage saturation characteristics and positive temperature coefficient (∼0.18 eV to 0.13 eV). This work is envisaged to benefit many areas of hydrothermal ZnO NW research, such as NW FETs, piezoelectric energy recovery, piezotronics and Schottky diodes.

Controlled growth of 1D and 2D ZnO nanostructures on 4H-SiC using Au catalyst.

A perfect control of nanostructure growth is a prerequisite for the development of electronic and optoelectronic device/systems. In this article, we demonstrate the growth of various ZnO-derived nanostructures, including well-ordered arrays of high aspect ratio single crystalline nanowires with preferred growth direction along the [0001] axis, nanowalls, and hybrid nanowire-nanowall structures. The growths of the various ZnO nanostructures have been carried out on SiC substrates in a horizontal furnace, using Au thin film as catalyst. From experimental observations, we have ascribed the growth mechanisms of the different ZnO nanostructures to be a combination of catalytic-assisted and non-catalytic-assisted vapor-liquid-solid (VLS) processes. We have also found that the different ZnO nanoarchitectures' material evolution is governed by a Zn cluster drift effects on the SiC surface mainly driven by growth temperature. Au thin film thickness, growth time, and temperature are the parameters to optimize in order to obtain the different ZnO nanoarchitectures.