Field enhancement induced by surface defects in two-dimensional ReSe2 field emitters.

The field emission properties of rhenium diselenide (ReSe2) nanosheets on Si/SiO2 substrates, obtained through mechanical exfoliation, have been investigated. The n-type conduction was confirmed by using nano-manipulated tungsten probes inside a scanning electrode microscope to directly contact the ReSe2 flake in back-gated field effect transistor configuration, avoiding any lithographic process. By performing a finite element electrostatic simulation of the electric field, it is demonstrated that the use of a tungsten probe as anode, at a controlled distance from the ReSe2 emitter surface, allows the collection of emitted electrons from a reduced area that furtherly decreases by reducing the tip-sample distance, i.e. allowing a local characterization of the field emission properties. Experimentally, it is shown that the turn-on voltage can be linearly reduced by reducing the cathode-anode separation distance. By comparing the measured current-voltage characteristics with the numerical simulations, it is also shown that the effective field enhancement on the emitter surface is larger than expected because of surface defects. Finally, it is confirmed that ReSe2 nanosheets are suitable field emitters with high time stability and low current fluctuations.

WS2 Nanotube Transistor for Photodetection and Optoelectronic Memory Applications.

Nanotube and nanowire transistors hold great promises for future electronic and optoelectronic devices owing to their downscaling possibilities. In this work, a single multi-walled tungsten disulfide (WS2) nanotube is utilized as the channel of a back-gated field-effect transistor. The device exhibits a p-type behavior in ambient conditions, with a hole mobility µp ≈  1.4 cm2V-1s-1 and a subthreshold swing SS ≈ 10 V dec-1. Current-voltage characterization at different temperatures reveals that the device presents two slightly different asymmetric Schottky barriers at drain and source contacts. Self-powered photoconduction driven by the photovoltaic effect is demonstrated, and a photoresponsivity R ≈ 10 mAW-1 at 2 V drain bias and room temperature. Moreover, the transistor is tested for data storage applications. A two-state memory is reported, where positive and negative gate pulses drive the switching between two different current states, separated by a window of 130%. Finally, gate and light pulses are combined to demonstrate an optoelectronic memory with four well-separated states. The results herein presented are promising for data storage, Boolean logic, and neural network applications.

Multilayer WS2 for low-power visible and near-infrared phototransistors.

Mechanically exfoliated multilayer WS2 flakes are used as the channel of field effect transistors for low-power photodetection in the visible and near-infrared (NIR) spectral range. The electrical characterization as a function of the temperature reveals devices with n-type conduction and slightly different Schottky barriers at the drain and source contacts. The WS2 phototransistors can be operated in self-powered mode, yielding both a current and a voltage when exposed to light. The spectral photoresponse in the visible and the NIR ranges shows a high responsivity (4.5 µA/W) around 1250 nm, making the devices promising for telecommunication applications.

Subthreshold Current Suppression in ReS2 Nanosheet-Based Field-Effect Transistors at High Temperatures.

Two-dimensional rhenium disulfide (ReS2), a member of the transition-metal dichalcogenide family, has received significant attention due to its potential applications in field-effect transistors (FETs), photodetectors, and memories. In this work, we investigate the suppression of the subthreshold current during the forward voltage gate sweep, leading to an inversion of the hysteresis in the transfer characteristics of ReS2 nanosheet-based FETs from clockwise to anticlockwise. We explore the impact of temperature, sweeping gate voltage, and pressure on this behavior. Notably, the suppression in current within the subthreshold region coincides with a peak in gate current, which increases beyond a specific temperature but remains unaffected by pressure. We attribute both the suppression in drain current and the presence of peak in gate current to the charge/discharge process of gate oxide traps by thermal-assisted tunnelling. The suppression of the subthreshold current at high temperatures not only reduces power consumption but also extends the operational temperature range of ReS2 nanosheet-based FETs.