Characterization of the piezoresistance in highly doped p-type 3C-SiC at cryogenic temperatures.

This paper reports on the piezoresistive effect in p-type 3C-SiC thin film mechanical sensing at cryogenic conditions. Nanothin 3C-SiC films with a carrier concentration of 2 × 1019 cm-3 were epitaxially grown on a Si substrate using the LPCVD process, followed by photolithography and UV laser engraving processes to form SiC-on-Si pressure sensors. The magnitude of the piezoresistive effect was measured by monitoring the change of the SiC conductance subjected to pressurizing/depressurizing cycles at different temperatures. Experimental results showed a relatively stable piezoresistive effect in the highly doped 3C-SiC film with the gauge factor slightly increased by 20% at 150 K with respect to that at room temperature. The data was also in good agreement with theoretical analysis obtained based on the charge transfer phenomenon. This finding demonstrates the potential of 3C-SiC for MEMS sensors used in a large range of temperatures from cryogenic to high temperatures.

Excellent Rectifying Properties of the n-3C-SiC/p-Si Heterojunction Subjected to High Temperature Annealing for Electronics, MEMS, and LED Applications.

This work examines the stability of epitaxial 3C-SiC/Si heterojunctions subjected to heat treatments between 1000 °C and 1300 °C. Because of the potential for silicon carbide in high temperature and harsh environment applications, and the economic advantages of growing the 3C-SiC polytype on large diameter silicon wafers, its stability after high temperature processing is an important consideration. Yet recently, this has been thrown into question by claims that the heterojunction suffers catastrophic degradation at temperatures above 1000 °C. Here we present results showing that the heterojunction maintains excellent diode characteristics following heat treatment up to 1100 °C and while some changes were observed between 1100 °C and 1300 °C, diodes maintained their rectifying characteristics, enabling compatibility with a large range of device fabrication. The parameters of as-grown diodes were J0 = 1 × 10-11 A/mm2, n = 1.02, and +/-2V rectification ratio of 9 × 106. Capacitance and thermal current-voltage analysis was used to characterize the excess current leakage mechanism. The change in diode characteristics depends on diode area, with larger areas (1 mm2) having reduced rectification ratio while smaller areas (0.04 mm2) maintained excellent characteristics of J0 = 2 × 10-10 A/mm2, n = 1.28, and +/-2V ratio of 3 × 106. This points to localized defect regions degrading after heat treatment rather than a fundamental issue of the heterojunction.

Superior Robust Ultrathin Single-Crystalline Silicon Carbide Membrane as a Versatile Platform for Biological Applications.

Micromachined membranes are promising platforms for cell culture thanks to their miniaturization and integration capabilities. Possessing chemical inertness, biocompatibility, and integration, silicon carbide (SiC) membranes have attracted great interest toward biological applications. In this paper, we present the batch fabrication, mechanical characterizations, and cell culture demonstration of robust ultrathin epitaxial deposited SiC membranes. The as-fabricated ultrathin SiC membranes, with an ultrahigh aspect ratio (length/thickness) of up to 20 000, possess high a fracture strength up to 2.95 GPa and deformation up to 50 µm. A high optical transmittance of above 80% at visible wavelengths was obtained for 50 nm membranes. The as-fabricated membranes were experimentally demonstrated as an excellent substrate platform for bio-MEMS/NEMS cell culture with the cell viability rate of more than 92% after 72 h. The ultrathin SiC membrane is promising for in vitro observations/imaging of bio-objects with an extremely short optical access.

Single-Crystalline 3C-SiC anodically Bonded onto Glass: An Excellent Platform for High-Temperature Electronics and Bioapplications.

Single-crystal cubic silicon carbide has attracted great attention for MEMS and electronic devices. However, current leakage at the SiC/Si junction at high temperatures and visible-light absorption of the Si substrate are main obstacles hindering the use of the platform in a broad range of applications. To solve these bottlenecks, we present a new platform of single crystal SiC on an electrically insulating and transparent substrate using an anodic bonding process. The SiC thin film was prepared on a 150 mm Si with a surface roughness of 7 nm using LPCVD. The SiC/Si wafer was bonded to a glass substrate and then the Si layer was completely removed through wafer polishing and wet etching. The bonded SiC/glass samples show a sharp bonding interface of less than 15 nm characterized using deep profile X-ray photoelectron spectroscopy, a strong bonding strength of approximately 20 MPa measured from the pulling test, and relatively high optical transparency in the visible range. The transferred SiC film also exhibited good conductivity and a relatively high temperature coefficient of resistance varying from -12 000 to -20 000 ppm/K, which is desirable for thermal sensors. The biocompatibility of SiC/glass was also confirmed through mouse 3T3 fibroblasts cell-culturing experiments. Taking advantage of the superior electrical properties and biocompatibility of SiC, the developed SiC-on-glass platform offers unprecedented potentials for high-temperature electronics as well as bioapplications.

Silicon etching using only Oxygen at high temperature: An alternative approach to Si micro-machining on 150 mm Si wafers.

Using a combination of low-pressure oxygen and high temperatures, isotropic and anisotropic silicon (Si) etch rates can be controlled up to ten micron per minute. By varying the process conditions, we show that the vertical-to-lateral etch rate ratio can be controlled from 1:1 isotropic etch to 1.8:1 anisotropic. This simple Si etching technique combines the main respective advantages of both wet and dry Si etching techniques such as fast Si etch rate, stiction-free, and high etch rate uniformity across a wafer. In addition, this alternative O2-based Si etching technique has additional advantages not commonly associated with dry etchants such as avoiding the use of halogens and has no toxic by-products, which improves safety and simplifies waste disposal. Furthermore, this process also exhibits very high selectivity (>1000:1) with conventional hard masks such as silicon carbide, silicon dioxide and silicon nitride, enabling deep Si etching. In these initial studies, etch rates as high as 9.2 µm/min could be achieved at 1150 °C. Empirical estimation for the calculation of the etch rate as a function of the feature size and oxygen flow rate are presented and used as proof of concepts.

Vertically Conductive Single-Crystal SiC-Based Bragg Reflector Grown on Si Wafer.

Single-crystal silicon carbide (SiC) thin-films on silicon (Si) were used for the fabrication and characterization of electrically conductive distributed Bragg reflectors (DBRs) on 100 mm Si wafers. The DBRs, each composed of 3 alternating layers of SiC and Al(Ga)N grown on Si substrates, show high wafer uniformity with a typical maximum reflectance of 54% in the blue spectrum and a stopband (at 80% maximum reflectance) as large as 100 nm. Furthermore, high vertical electrical conduction is also demonstrated resulting to a density of current exceeding 70 A/cm(2) above 1.5 V. Such SiC/III-N DBRs with high thermal and electrical conductivities could be used as pseudo-substrate to enhance the efficiency of SiC-based and GaN-based optoelectronic devices on large Si wafers.

Kinetic surface roughening and wafer bow control in heteroepitaxial growth of 3C-SiC on Si(111) substrates.

A thin, chemically inert 3C-SiC layer between GaN and Si helps not only to avoid the "melt-back" effect, but also to inhibit the crack generation in the grown GaN layers. The quality of GaN layer is heavily dependent on the unique properties of the available 3C-SiC/Si templates. In this paper, the parameters influencing the roughness, crystalline quality, and wafer bow are investigated and engineered to obtain high quality, low roughness 3C-SiC/Si templates suitable for subsequent GaN growth and device processing. Kinetic surface roughening and SiC growth mechanisms, which depend on both deposition temperature and off-cut angle, are reported for heteroepitaxial growth of 3C-SiC on Si substrates. The narrower terrace width on 4° off-axis Si enhances the step-flow growth at 1200 °C, with the roughness of 3C-SiC remaining constant with increasing thickness, corresponding to a scaling exponent of zero. Crack-free 3C-SiC grown on 150-mm Si substrate with a wafer bow of less than 20 µm was achieved. Both concave and convex wafer bow can be obtained by in situ tuning of the deposited SiC layer thicknesses. The 3C-SiC grown on off-axis Si, compared to that grown on on-axis Si, has lower surface roughness, better crystallinity, and smaller bow magnitude.