Nanostructured surfaces frustrate polymer semiconductor molecular orientation.

Nanostructured grating surfaces with groove widths less than 200 nm impose boundary conditions that frustrate the natural molecular orientational ordering within thin films of blended polymer semiconductor poly(3-hexlythiophene) and phenyl-C61-butyric acid methyl ester, as revealed by grazing incidence X-ray scattering measurements. Polymer interactions with the grating sidewall strongly inhibit the polymer lamellar alignment parallel to the substrate typically found in planar films, in favor of alignment perpendicular to this orientation, resulting in a preferred equilibrium molecular configuration difficult to achieve by other means. Grating surfaces reduce the relative population of the parallel orientation from 30% to less than 5% in a 400 nm thick film. Analysis of in-plane X-ray scattering with respect to grating orientation shows polymer backbones highly oriented to within 10 degrees of parallel to the groove direction.

One-volt operation of high-current vertical channel polymer semiconductor field-effect transistors.

We realize a vertical channel polymer semiconductor field effect transistor architecture by confining the organic material within gratings of interdigitated trenches. The geometric space savings of a perpendicular channel orientation results in devices sourcing areal current densities in excess of 40 mA/cm(2), using a one-volt supply voltage, and maintaining near-ideal device operating characteristics. Vertical channel transistors have a similar electronic mobility to that of planar devices using the same polymer semiconductor, consistent with a molecular reorientation within confining trenches we understand through X-ray scattering measurements.

Real-time TEM imaging of the formation of crystalline nanoscale gaps.

We present real-time transmission electron microscopy of nanogap formation by feedback controlled electromigration that reveals a remarkable degree of crystalline order. Crystal facets appear during feedback controlled electromigration indicating a layer-by-layer, highly reproducible electromigration process avoiding thermal runaway and melting. These measurements provide insight into the electromigration induced failure mechanism in sub-20 nm size interconnects, indicating that the current density at failure increases as the width decreases to approximately 1 nm.

Parallel fabrication of nanogap electrodes.

We have developed a technique for simultaneously fabricating large numbers of nanogaps in a single processing step using feedback-controlled electromigration. Parallel nanogap formation is achieved by a balanced simultaneous process that uses a novel arrangement of nanoscale shorts between narrow constrictions where the nanogaps form. Because of this balancing, the fabrication of multiple nanoelectrodes is similar to that of a single nanogap junction. The technique should be useful for constructing complex circuits of molecular-scale electronic devices.

Clean electromigrated nanogaps imaged by transmission electron microscopy.

Electromigrated nanogaps have shown great promise for use in molecular scale electronics. We have fabricated nanogaps on free-standing transparent SiN(x) membranes which permit the use of transmission electron microscopy (TEM) to image the gaps. The electrodes are formed by extending a recently developed controlled electromigration procedure and yield a nanogap with approximately 5 nm separation clear of any apparent debris. The gaps are stable, on the order of hours as measured by TEM, but over time (months) relax to about 20 nm separation determined by the surface energy of the Au electrodes. A major benefit of electromigrated nanogaps on SiN(x) membranes is that the junction pinches in away from residual metal left from the Au deposition which could act as a parasitic conductance path. This work has implications to the design of clean metallic electrodes for use in nanoscale devices where the precise geometry of the electrode is important.

Electronic devices based on purified carbon nanotubes grown by high-pressure decomposition of carbon monoxide.

The excellent properties of transistors, wires and sensors made from single-walled carbon nanotubes (SWNTs) make them promising candidates for use in advanced nanoelectronic systems. Gas-phase growth procedures such as the high-pressure decomposition of carbon monoxide (HiPCO) method yield large quantities of small-diameter semiconducting SWNTs, which are ideal for use in nanoelectronic circuits. As-grown HiPCO material, however, commonly contains a large fraction of carbonaceous impurities that degrade the properties of SWNT devices. Here we demonstrate a purification, deposition and fabrication process that yields devices consisting of metallic and semiconducting nanotubes with electronic characteristics vastly superior to those of circuits made from raw HiPCO. Source-drain current measurements on the circuits as a function of temperature and backgate voltage are used to quantify the energy gap of semiconducting nanotubes in a field-effect transistor geometry. This work demonstrates significant progress towards the goal of producing complex integrated circuits from bulk-grown SWNT material.