RESUMO
High-efficiency silicon solar cells rely on some form of passivating contact structure to reduce recombination losses at the crystalline silicon surface and losses at the metal/Si contact interface. One such structure is polycrystalline silicon (poly-Si) on oxide, where heavily doped poly-Si is deposited on a SiOx layer grown directly on the crystalline silicon (c-Si) wafer. Depending on the thickness of the SiOx layer, the charge carriers can cross this layer by tunneling (<2 nm SiOx thickness) or by direct conduction through disruptions in the SiOx, often referred to as pinholes, in thicker SiOx layers (>2 nm). In this work, we study structures with tunneling- or pinhole-like SiOx contacts grown on pyramidally textured c-Si wafers and expose variations in the SiOx layer properties related to surface morphology using electron-beam-induced current (EBIC) imaging. Using EBIC, we identify and mark regions with potential pinholes in the SiOx layer. We further perform high-resolution transmission electron microscopy on the same areas, thus allowing us to directly correlate locally enhanced carrier collection with variations in the structure of the SiOx layer. Our results show that the pinholes in the SiOx layer preferentially form in different locations based on the annealing conditions used to form the device. With greater understanding of these processes and by controlling the surface texture geometry, there is potential to control the size and spatial distribution of oxide disruptions in silicon solar cells with poly-Si on oxide-type contacts; usually, this is a random phenomenon on polished or planar surfaces. Such control will enable us to consistently produce high-efficiency devices with low recombination currents and low junction resistances using this contact structure.
RESUMO
High-efficiency crystalline silicon (Si) solar cells require textured surfaces for efficient light trapping. However, passivation of a textured surface to reduce carrier recombination is difficult. Here, we relate the electrical properties of cells fabricated on a KOH-etched, random pyramidal-textured Si surface to the nanostructure of the passivated contact and the textured surface morphology. The effects of both microscopic pyramidal morphology and nanoscale surface roughness on passivated contacts consisting of polycrystalline Si (poly-Si) deposited on top of an ultrathin, 1.5-2.2 nm, SiOx layer are investigated. Using atomic force microscopy, we show a pyramid face, which is predominantly a Si(111) plane to be significantly rougher than a polished Si(111) surface. This roughness results in a nonuniform SiOx layer as determined by transmission electron microscopy of a poly-Si/SiOx contact. Our device measurements also show an overall more resistive and hence a thicker SiOx layer over the pyramidal surface as compared to a polished Si(111) surface, which we relate to increased surface roughness. Using electron-beam-induced current measurements of poly-Si/SiOx contacts, we further show that the SiOx layer near the pyramid valleys is preferentially more conducting and hence likely thinner than over pyramid tips, edges, and faces. Hence, both the microscopic pyramidal morphology and nanoscale roughness lead to a nonuniform SiOx layer, thus leading to poor poly-Si/SiOx contact passivation. Finally, we report >21% efficient and ≥80% fill-factor front/back poly-Si/SiOx solar cells on both single-side and double-side textured wafers without the use of transparent conductive oxide layers, and show that the poorer contact passivation on a textured surface is limited to boron-doped poly-Si/SiOx contacts.