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1.
Sci Rep ; 14(1): 8897, 2024 Apr 17.
Artigo em Inglês | MEDLINE | ID: mdl-38632304

RESUMO

The synapse is a key element circuit in any memristor-based neuromorphic computing system. A memristor is a two-terminal analog memory device. Memristive synapses suffer from various challenges including high voltage, SET or RESET failure, and READ margin issues that can degrade the distinguishability of stored weights. Enhancing READ resolution is very important to improving the reliability of memristive synapses. Usually, the READ resolution is very small for a memristive synapse with a 4-bit data precision. This work considers a step-by-step analysis to enhance the READ current resolution or the read current difference between two resistance levels for a current-controlled memristor-based synapse. An empirical model is used to characterize the HfO 2 based memristive device. 1 st and 2 nd stage device of our proposed synapse design can be scaled to enhance the READ current margin up to ∼ 4.3 × and ∼ 21%, respectively. Moreover, READ current resolution can be enhanced with run-time adaptation techniques such as READ voltage scaling and body biasing. The READ voltage scaling and body biasing can improve the READ current resolution by about 46% and 15%, respectively. TENNLab's neuromorphic computing framework is leveraged to evaluate the effect of READ current resolution on classification, control, and reservoir computing applications. Higher READ current resolution shows better accuracy than lower resolution even when facing different levels of read noise.

2.
Nat Commun ; 10(1): 3852, 2019 Aug 21.
Artigo em Inglês | MEDLINE | ID: mdl-31434896

RESUMO

An amendment to this paper has been published and can be accessed via a link at the top of the paper.

3.
Nat Commun ; 10(1): 3239, 2019 07 19.
Artigo em Inglês | MEDLINE | ID: mdl-31324794

RESUMO

Two-terminal memory elements, or memelements, capable of co-locating signal processing and memory via history-dependent reconfigurability at the nanoscale are vital for next-generation computing materials striving to match the brain's efficiency and flexible cognitive capabilities. While memory resistors, or memristors, have been widely reported, other types of memelements remain underexplored or undiscovered. Here we report the first example of a volatile, voltage-controlled memcapacitor in which capacitive memory arises from reversible and hysteretic geometrical changes in a lipid bilayer that mimics the composition and structure of biomembranes. We demonstrate that the nonlinear dynamics and memory are governed by two implicitly-coupled, voltage-dependent state variables-membrane radius and thickness. Further, our system is capable of tuneable signal processing and learning via synapse-like, short-term capacitive plasticity. These findings will accelerate the development of low-energy, biomolecular neuromorphic memelements, which, in turn, could also serve as models to study capacitive memory and signal processing in neuronal membranes.


Assuntos
Membrana Celular/fisiologia , Capacitância Elétrica , Bicamadas Lipídicas , Memória/fisiologia , Dinâmica não Linear , Algoritmos , Biomimética/métodos , Sinapses Elétricas/fisiologia , Aprendizagem/fisiologia , Modelos Teóricos , Plasticidade Neuronal/fisiologia , Neurônios/citologia , Neurônios/fisiologia
4.
J Vis Exp ; (145)2019 03 09.
Artigo em Inglês | MEDLINE | ID: mdl-30907866

RESUMO

The ability to recreate synaptic functionalities in synthetic circuit elements is essential for neuromorphic computing systems that seek to emulate the cognitive powers of the brain with comparable efficiency and density. To date, silicon-based three-terminal transistors and two-terminal memristors have been widely used in neuromorphic circuits, in large part due to their ability to co-locate information processing and memory. Yet these devices cannot achieve the interconnectivity and complexity of the brain because they are power-hungry, fail to mimic key synaptic functionalities, and suffer from high noise and high switching voltages. To overcome these limitations, we have developed and characterized a biomolecular memristor that mimics the composition, structure, and switching characteristics of biological synapses. Here, we describe the process of assembling and characterizing biomolecular memristors consisting of a 5 nm-thick lipid bilayer formed between lipid-functionalized water droplets in oil and doped with voltage-activated alamethicin peptides. While similar assembly protocols have been used to investigate biophysical properties of droplet-supported lipid membranes and membrane-bound ion channels, this article focuses on key modifications of the droplet interface bilayer method essential for achieving consistent memristor performance. Specifically, we describe the liposome preparation process and the incorporation of alamethicin peptides in lipid bilayer membranes, and the appropriate concentrations of each constituent as well as their impact on the overall response of the memristors. We also detail the characterization process of biomolecular memristors, including measurement and analysis of memristive current-voltage relationships obtained via cyclic voltammetry, as well as short-term plasticity and learning in response to step-wise voltage pulse trains.


Assuntos
Bicamadas Lipídicas , Sinapses/fisiologia , Alameticina , Biomimética , Canais Iônicos , Lipossomos
5.
Entropy (Basel) ; 20(5)2018 May 18.
Artigo em Inglês | MEDLINE | ID: mdl-33265470

RESUMO

Training deep learning networks is a difficult task due to computational complexity, and this is traditionally handled by simplifying network topology to enable parallel computation on graphical processing units (GPUs). However, the emergence of quantum devices allows reconsideration of complex topologies. We illustrate a particular network topology that can be trained to classify MNIST data (an image dataset of handwritten digits) and neutrino detection data using a restricted form of adiabatic quantum computation known as quantum annealing performed by a D-Wave processor. We provide a brief description of the hardware and how it solves Ising models, how we translate our data into the corresponding Ising models, and how we use available expanded topology options to explore potential performance improvements. Although we focus on the application of quantum annealing in this article, the work discussed here is just one of three approaches we explored as part of a larger project that considers alternative means for training deep learning networks. The other approaches involve using a high performance computing (HPC) environment to automatically find network topologies with good performance and using neuromorphic computing to find a low-power solution for training deep learning networks. Our results show that our quantum approach can find good network parameters in a reasonable time despite increased network topology complexity; that HPC can find good parameters for traditional, simplified network topologies; and that neuromorphic computers can use low power memristive hardware to represent complex topologies and parameters derived from other architecture choices.

6.
IEEE Trans Neural Netw Learn Syst ; 25(10): 1864-78, 2014 Oct.
Artigo em Inglês | MEDLINE | ID: mdl-25291739

RESUMO

By mimicking the highly parallel biological systems, neuromorphic hardware provides the capability of information processing within a compact and energy-efficient platform. However, traditional Von Neumann architecture and the limited signal connections have severely constrained the scalability and performance of such hardware implementations. Recently, many research efforts have been investigated in utilizing the latest discovered memristors in neuromorphic systems due to the similarity of memristors to biological synapses. In this paper, we explore the potential of a memristor crossbar array that functions as an autoassociative memory and apply it to brain-state-in-a-box (BSB) neural networks. Especially, the recall and training functions of a multianswer character recognition process based on the BSB model are studied. The robustness of the BSB circuit is analyzed and evaluated based on extensive Monte Carlo simulations, considering input defects, process variations, and electrical fluctuations. The results show that the hardware-based training scheme proposed in the paper can alleviate and even cancel out the majority of the noise issue.


Assuntos
Dispositivos de Armazenamento em Computador , Sistemas Computacionais , Nanotecnologia/instrumentação , Redes Neurais de Computação , Computadores , Humanos , Nanotecnologia/métodos
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