RESUMO
Optical phase-change materials are highly promising for emerging applications such as tunable metasurfaces, reconfigurable photonic circuits, and non-von Neumann computing. However, these materials typically require both high melting temperatures and fast quenching rates to reversibly switch between their crystalline and amorphous phases: a significant challenge for large-scale integration. In this work, we use temperature-dependent ellipsometry to study the thermo-optic effect in GST and use these results to demonstrate an experimental technique that leverages the thermo-optic effect in GST to enable both spatial and temporal thermal measurements of two common electro-thermal microheater designs currently used by the phase-change community. Our approach shows excellent agreement between experimental results and numerical simulations and provides a noninvasive method for rapid characterization of electrically programmable phase-change devices.
RESUMO
Two-dimensional (2D) materials are promising candidates for future electronics due to their excellent electrical and photonic properties. Although promising results on the wafer-scale synthesis (≤150 mm diameter) of monolayer molybdenum disulfide (MoS2) have already been reported, the high-quality synthesis of 2D materials on wafers of 200 mm or larger, which are typically used in commercial silicon foundries, remains difficult. The back-end-of-line (BEOL) integration of directly grown 2D materials on silicon complementary metal-oxide-semiconductor (CMOS) circuits is also unavailable due to the high thermal budget required, which far exceeds the limits of silicon BEOL integration (<400 °C). This high temperature forces the use of challenging transfer processes, which tend to introduce defects and contamination to both the 2D materials and the BEOL circuits. Here we report a low-thermal-budget synthesis method (growth temperature < 300 °C, growth time ≤ 60 min) for monolayer MoS2 films, which enables the 2D material to be synthesized at a temperature below the precursor decomposition temperature and grown directly on silicon CMOS circuits without requiring any transfer process. We designed a metal-organic chemical vapour deposition reactor to separate the low-temperature growth region from the high-temperature chalcogenide-precursor-decomposition region. We obtain monolayer MoS2 with electrical uniformity on 200 mm wafers, as well as a high material quality with an electron mobility of ~35.9 cm2 V-1 s-1. Finally, we demonstrate a silicon-CMOS-compatible BEOL fabrication process flow for MoS2 transistors; the performance of these silicon devices shows negligible degradation (current variation < 0.5%, threshold voltage shift < 20 mV). We believe that this is an important step towards monolithic 3D integration for future electronics.
RESUMO
Homogeneous ternary oxides of silicon-, niobium-, and molybdenum-aluminate were deposited by plasma-enhanced ALD using sequential metal precursor pulses prior to the oxidation step, to reduce interfacial defects usually observed in nanolaminate growth. The growth kinetics can be understood in terms of competitive adsorption. Trimethyl aluminum (TMA) is strongly chemisorbed to the growth surface and does not permit coadsorption of any of the other precursors; when we lead with a TMA pulse, the resulting film is always Al2O3. When we lead with the Si or Nb precursors, the growth surface is partially saturated, but open sites are available for TMA coadsorption. The Mo precursor is weakly chemisorbed and is largely displaced by a subsequent TMA dose. As compared to nanolaminate films of the constituent binary oxides, the interface state density is reduced by up to a factor of 5.
RESUMO
A lack of inversion symmetry coupled with the presence of time-reversal symmetry endows 2D transition metal dichalcogenides with individually addressable valleys in momentum space at the K and K' points in the first Brillouin zone. This valley addressability opens up the possibility of using the momentum state of electrons, holes, or excitons as a completely new paradigm in information processing. The opportunities and challenges associated with manipulation of the valley degree of freedom for practical quantum and classical information processing applications were analyzed during the 2017 Workshop on Valleytronic Materials, Architectures, and Devices; this Review presents the major findings of the workshop.