The influence of charge on the translation of the sandwich ELISA approach to electronic biosensors.

The sandwich approach, whereby an antigen is captured by a primary antibody and detected by a secondary antibody, is commonly used to improve the selectivity and sensitivity of enzyme-linked immunosorbent assays (ELISA). This work details the experimental factors that impact the reliable translation of this sandwich approach to two commonly used electronic biosensors, namely potentiometric and impedimetric biosensors. Previous studies have demonstrated the Debye screening limitations associated with potentiometric biosensors. However, the correlation between the ionic strength of the measurement buffer and the impedimetric biosensing response has not been studied. Potentiometric biosensors were able to successfully detect the primary antibody and the target antigen by decreasing the ionic strength of the phosphate buffered saline (PBS) measurement buffer from 1x PBS to 0.01x PBS. However, the secondary antibody used for the selective signal amplification was not reliably detected. Therefore, the sandwich approach is not viable for potentiometric sensing at biologically relevant ionic strengths, due to the Debye screening effect. Alternatively, decreasing the ionic strength of the measurement buffer allowed for the successful translation of the sandwich approach to impedimetric biosensors. Impedimetric biosensing literature typically attributes a measured increase in the charge transfer resistance to an increase in the thickness of the immobilized biolayer. However, this work highlights the influence that both the charge and thickness of the biolayer have on the transport of the redox couple. Decreasing the ionic strength of the measurement buffer lowers the molecular charge screening effect. This permits the transport of a positively charged redox probe through a negatively charged immobilized biolayer via migration and diffusion. The results demonstrate that the use of a buffer at a lower, yet biologically relevant ionic strength allows for the successful translation of the sandwich approach to impedimetric biosensors.

Trade-off between Gradual Set and On/Off Ratio in HfOx-Based Analog Memory with a Thin SiOx Barrier Layer.

HfOx-based synapses are widely accepted as a viable candidate for both in-memory and neuromorphic computing. Resistance change in oxide-based synapses is caused by the motion of oxygen vacancies. HfOx-based synapses typically demonstrate an abrupt nonlinear resistance change under positive bias application (set), limiting their viability as analog memory. In this work, a thin barrier layer of AlOx or SiOx is added to the bottom electrode/oxide interface to slow the migration of oxygen vacancies. Electrical results show that the resistance change in HfOx/SiOx devices is more controlled than the HfOx devices during the set. While the on/off ratio for the HfOx/SiOx devices is still large (∼10), it is shown to be smaller than that of HfOx/AlOx and HfOx devices. Finite element modeling suggests that the slower oxygen vacancy migration in HfOx/SiOx devices during reset results in a narrower rupture region in the conductive filament. The narrower rupture region causes a lower high resistance state and, thus, a smaller on/off ratio for the HfOx/SiOx devices. Overall, the results show that slowing the motion of oxygen vacancies in the barrier layer devices improves the resistance change during the set but lowers the on/off ratio.

Bottom-up nanoscale patterning and selective deposition on silicon nanowires.

We demonstrate a bottom-up process for programming the deposition of coaxial thin films aligned to the underlying dopant profile of semiconductor nanowires. Our process synergistically combines three distinct methods-vapor-liquid-solid nanowire growth, selective coaxial lithography via etching of surfaces (SCALES), and area-selective atomic layer deposition (AS-ALD)-into a cohesive whole. Here, we study ZrO2on Si nanowires as a model system. Si nanowires are first grown with an axially modulated n-Si/i-Si dopant profile. SCALES then yields coaxial poly(methyl methacrylate) (PMMA) masks on the n-Si regions. Subsequent AS-ALD of ZrO2occurs on the exposed i-Si regions and not on those masked by PMMA. We show the spatial relationship between nanowire dopant profile, PMMA masks, and ZrO2films, confirming the programmability of the process. The nanoscale resolution of our process coupled with the plethora of available AS-ALD chemistries promises a range of future opportunities to generate structurally complex nanoscale materials and electronic devices using entirely bottom-up methods.

Measurement of gas-concentration-driven permeation for the examination of permeability, solubility, and diffusivity in varying materials.

This manuscript describes the development and operation of an apparatus for the measurement of steady-state and transient gas permeation through different types of solid materials with varying geometries. It is capable of operation from 293 K to 673 K and could theoretically be used with any non-corrosive gas or a mix of gases, although only hydrogen isotopes are used in the current study. A quadrupole mass spectrometer is used to measure permeation fluxes as low as 1011 molecules/s. This unique test setup allows for the simultaneous measurement of diffusivity, solubility, and permeability. Furthermore, varying the pressure in the fore-sample volume allows for tests of Sievert's law and can give information on surface effects.

Synthetic Engineering of Morphology and Electronic Band Gap in Lateral Heterostructures of Monolayer Transition Metal Dichalcogenides.

Heterostructures of two-dimensional transition metal dichalcogenides (TMDs) can offer a plethora of opportunities in condensed matter physics, materials science, and device engineering. However, despite state-of-the-art demonstrations, most current methods lack enough degrees of freedom for the synthesis of heterostructures with engineerable properties. Here, we demonstrate that combining a postgrowth chalcogen-swapping procedure with the standard lithography enables the realization of lateral TMD heterostructures with controllable dimensions and spatial profiles in predefined locations on a substrate. Indeed, our protocol receives a monolithic TMD monolayer (e.g., MoSe2) as the input and delivers lateral heterostructures (e.g., MoSe2-MoS2) with fully engineerable morphologies. In addition, through establishing MoS2xSe2(1-x)-MoS2ySe2(1-y) lateral junctions, our synthesis protocol offers an extra degree of freedom for engineering the band gap energies up to ∼320 meV on each side of the heterostructure junction via changing x and y independently. Our electron microscopy analysis reveals that such continuous tuning stems from the random intermixing of sulfur and selenium atoms following the chalcogen swapping. We believe that, by adding an engineering flavor to the synthesis of TMD heterostructures, our study lowers the barrier for the integration of two-dimensional materials into practical optoelectronic platforms.

Bottom-Up Masking of Si/Ge Surfaces and Nanowire Heterostructures via Surface-Initiated Polymerization and Selective Etching.

The fully bottom-up and scalable synthesis of complex micro/nanoscale materials and functional devices requires masking methods to define key features and direct the deposition of various coatings and films. Here, we demonstrate selective coaxial lithography via etching of surfaces (SCALES), an enabling bottom-up process to add polymer masks to micro/nanoscale objects. SCALES is a three-step process, including (1) bottom-up synthesis of compositionally modulated structures, (2) surface-initiated polymerization of a conformal mask, and (3) selective removal of the mask only from regions whose underlying surface is susceptible to an etchant. We demonstrate the key features of and characterize the SCALES process with a series of model Si/Ge systems: Si and Ge wafers, Si and Ge nanowires, and Si/Ge heterostructure nanowires.

Impact of Synthesized MoS2 Wafer-Scale Quality on Fermi Level Pinning in Vertical Schottky-Barrier Heterostructures.

Transition metal dichalcogenide (TMD)-based vertical Schottky heterostructures have recently shown promise as a next generation device for a variety of applications. In order for these devices to operate effectively, the interface between the TMD and metal contacts must be well-understood and optimized. In this work, the interface between synthesized MoS2 and gold or platinum metal contacts is explored as a function of MoS2 film quality to understand Fermi level pinning effects. Raman, X-ray photoelectron spectroscopy, and ultraviolet photoelectron spectroscopy are used to physically characterize both MoS2 and MoS2/metal interface. Metal/MoS2/metal purely vertical heterostructure cross-point devices were fabricated to explore the injection behavior across the Schottky barrier formed between MoS2 and the metal. The temperature dependence of the device behavior is used to understand injection mechanisms, and modeling is performed to verify the injection mechanisms across the interface barrier. By combining both physical characterization with electrical results and modeling, Fermi level pinning is investigated as a function of macroscopic MoS2 quality. Low-quality MoS2 was found to exhibit much stronger pinning than high-quality films, which is consistent with an observed increase in covalency of the metal/MoS2 interface. Additionally, MoS2 was found to pin gold much more strongly than platinum, which is consistent with an increased covalent interaction between MoS2 and gold. These results show that the synthesis temperature and, therefore, the quality of MoS2 dramatically impacts Fermi level pinning and the resultant current-voltage characteristics of Schottky barrier-mediated devices.

Graphene-Molybdenum Disulfide-Graphene Tunneling Junctions with Large-Area Synthesized Materials.

Tunneling devices based on vertical heterostructures of graphene and other 2D materials can overcome the low on-off ratios typically observed in planar graphene field-effect transistors. This study addresses the impact of processing conditions on two-dimensional materials in a fully integrated heterostructure device fabrication process. In this paper, graphene-molybdenum disulfide-graphene tunneling heterostructures were fabricated using only large-area synthesized materials, unlike previous studies that used small exfoliated flakes. The MoS2 tunneling barrier is either synthesized on a sacrificial substrate and transferred to the bottom-layer graphene or synthesized directly on CVD graphene. The presence of graphene was shown to have no impact on the quality of the grown MoS2. The thickness uniformity of MoS2 grown on graphene and SiO2 was found to be 1.8 ± 0.22 nm. XPS and Raman spectroscopy are used to show how the MoS2 synthesis process introduces defects into the graphene structure by incorporating sulfur into the graphene. The incorporation of sulfur was shown to be greatly reduced in the absence of molybdenum suggesting molybdenum acts as a catalyst for sulfur incorporation. Tunneling simulations based on the Bardeen transfer Hamiltonian were performed and compared to the experimental tunneling results. The simulations show the use of MoS2 as a tunneling barrier suppresses contributions to the tunneling current from the conduction band. This is a result of the observed reduction of electron conduction within the graphene sheets.

A potentiometric biosensor for rapid on-site disease diagnostics.

Quantitative point-of-care (POC) devices are the next generation for serological disease diagnosis. Whilst pathogen serology is typically performed by centralized laboratories using Enzyme-Linked ImmunoSorbent Assay (ELISA), faster on-site diagnosis would infer improved disease management and treatment decisions. Using the model pathogen Bovine Herpes Virus-1 (BHV-1) this study employs an extended-gate field-effect transistor (FET) for direct potentiometric serological diagnosis. BHV-1 is a major viral pathogen of Bovine Respiratory Disease (BRD), the leading cause of economic loss ($2 billion annually in the US only) to the cattle and dairy industry. To demonstrate the sensor capabilities as a diagnostic tool, BHV-1 viral protein gE was expressed and immobilized on the sensor surface to serve as a capture antigen for a BHV-1-specific antibody (anti-gE), produced in cattle in response to viral infection. The gE-coated immunosensor was shown to be highly sensitive and selective to anti-gE present in commercially available anti-BHV-1 antiserum and in real serum samples from cattle with results being in excellent agreement with Surface Plasmon Resonance (SPR) and ELISA. The FET sensor is significantly faster than ELISA (<10 min), a crucial factor for successful disease intervention. This sensor technology is versatile, amenable to multiplexing, easily integrated to POC devices, and has the potential to impact a wide range of human and animal diseases.

Field-effect transistors based on wafer-scale, highly uniform few-layer p-type WSe2.

The synthesis of few-layer tungsten diselenide (WSe2) via chemical vapor deposition typically results in highly non-uniform thickness due to nucleation initiated growth of triangular domains. In this work, few-layer p-type WSe2 with wafer-scale thickness and electrical uniformity is synthesized through direct selenization of thin films of e-beam evaporated W on SiO2 substrates. Raman maps over a large area of the substrate show small variations in the main peak position, indicating excellent thickness uniformity across several square centimeters. Additionally, field-effect transistors fabricated from the wafer-scale WSe2 films demonstrate uniform electrical performance across the substrate. The intrinsic field-effect mobility of the films at a carrier concentration of 3 × 10(12) cm(-2) is 10 cm(2) V(-1) s(-1). The unprecedented uniformity of the WSe2 on wafer-scale substrates provides a substantial step towards producing manufacturable materials that are compatible with conventional semiconductor fabrication processes.

Flexible MoS2 Field-Effect Transistors for Gate-Tunable Piezoresistive Strain Sensors.

Atomically thin molybdenum disulfide (MoS2) is a promising two-dimensional semiconductor for high-performance flexible electronics, sensors, transducers, and energy conversion. Here, piezoresistive strain sensing with flexible MoS2 field-effect transistors (FETs) made from highly uniform large-area films is demonstrated. The origin of the piezoresistivity in MoS2 is the strain-induced band gap change, which is confirmed by optical reflection spectroscopy. In addition, the sensitivity to strain can be tuned by more than 1 order of magnitude by adjusting the Fermi level via gate biasing.

Enhanced Resonant Tunneling in Symmetric 2D Semiconductor Vertical Heterostructure Transistors.

Tunneling transistors with negative differential resistance have widespread appeal for both digital and analog electronics. However, most attempts to demonstrate resonant tunneling devices, including graphene-insulator-graphene structures, have resulted in low peak-to-valley ratios, limiting their application. We theoretically demonstrate that vertical heterostructures consisting of two identical monolayer 2D transition-metal dichalcogenide semiconductor electrodes and a hexagonal boron nitride barrier result in a peak-to-valley ratio several orders of magnitude higher than the best that can be achieved using graphene electrodes. The peak-to-valley ratio is large even at coherence lengths on the order of a few nanometers, making these devices appealing for nanoscale electronics.

Controlled doping of large-area trilayer MoS2 with molecular reductants and oxidants.

Highly uniform large-area MoS2 is chemically doped using molecular reductants and oxidants. Electrical measurements, photoemission, and Raman spectroscopy are used to study the doping effect and to understand the underlying mechanism. Strong work-function changes of up to ±1 eV can be achieved, with contributions from state filling and surface dipoles. This results in high doping densities of up to ca. 8 × 10(12) cm(-2) .

Low-temperature fabrication of spiking soma circuits using nanocrystalline-silicon TFTs.

Spiking neuron circuits consisting of ambipolar nanocrystalline-silicon (nc-Si) thin-film transistors (TFTs) have been fabricated using low temperature processing conditions (maximum of 250 °C) that allow the use of flexible substrates. These circuits display behaviors commonly observed in biological neurons such as millisecond spike duration, nonlinear frequency-current relationship, and spike frequency adaptation. The maximum drive capacity of a simple soma circuit was estimated to be approximately 9200 synapses. The effect of bias stress-induced threshold voltage degradation of component nc-Si TFTs on the spike frequency of soma circuits is explored. The measured power consumption of the circuit when spiking at 100 Hz was approximately 12 nW. Finally, the power consumption of the soma circuits at different spiking conditions and its implications on a large-scale system are discussed. The fabricated circuits can be employed as part of a compact multilayer learning network.

Reducing extrinsic performance-limiting factors in graphene grown by chemical vapor deposition.

Field-effect transistors fabricated on graphene grown by chemical vapor deposition (CVD) often exhibit large hysteresis accompanied by low mobility, high positive backgate voltage corresponding to the minimum conductivity point (V(min)), and high intrinsic carrier concentration (n(0)). In this report, we show that the mobility reported to date for CVD graphene devices on SiO(2) is limited by trapped water between the graphene and SiO(2) substrate, impurities introduced during the transfer process and adsorbates acquired from the ambient. We systematically study the origin of the scattering impurities and report on a process which achieves the highest mobility (µ) reported to date on large-area devices for CVD graphene on SiO(2): maximum mobility (µ(max)) of 7800 cm(2)/(V·s) measured at room temperature and 12,700 cm(2)/(V·s) at 77 K. These mobility values are close to those reported for exfoliated graphene on SiO(2) and can be obtained through the careful control of device fabrication steps including minimizing resist residue and non-aqueous transfer combined with annealing. It is also observed that CVD graphene is prone to adsorption of atmospheric species, and annealing at elevated temperature in vacuum helps remove these species.

Neural learning circuits utilizing nano-crystalline silicon transistors and memristors.

Properties of neural circuits are demonstrated via SPICE simulations and their applications are discussed. The neuron and synapse subcircuits include ambipolar nano-crystalline silicon transistor and memristor device models based on measured data. Neuron circuit characteristics and the Hebbian synaptic learning rule are shown to be similar to biology. Changes in the average firing rate learning rule depending on various circuit parameters are also presented. The subcircuits are then connected into larger neural networks that demonstrate fundamental properties including associative learning and pulse coincidence detection. Learned extraction of a fundamental frequency component from noisy inputs is demonstrated. It is then shown that if the fundamental sinusoid of one neuron input is out of phase with the rest, its synaptic connection changes differently than the others. Such behavior indicates that the system can learn to detect which signals are important in the general population, and that there is a spike-timing-dependent component of the learning mechanism. Finally, future circuit design and considerations are discussed, including requirements for the memristive device.

One-step selective chemistry for silicon-on-insulator sensor geometries.

A one-step functionalization process has been developed for oxide-free channels of field effect transistor structures, enabling a self-selective grafting of receptor molecules on the device active area, while protecting the nonactive part from nonspecific attachment of target molecules. Characterization of the self-organized chemical process is performed on both Si(100) and SiO(2) surfaces by infrared and X-ray photoelectron spectroscopy, atomic force microscopy, and electrical measurements. This selective functionalization leads to structures with better chemical stability, reproducibility, and reliability than current SiO(2)-based devices using silane molecules.

Large-area graphene single crystals grown by low-pressure chemical vapor deposition of methane on copper.

Graphene single crystals with dimensions of up to 0.5 mm on a side were grown by low-pressure chemical vapor deposition in copper-foil enclosures using methane as a precursor. Low-energy electron microscopy analysis showed that the large graphene domains had a single crystallographic orientation, with an occasional domain having two orientations. Raman spectroscopy revealed the graphene single crystals to be uniform monolayers with a low D-band intensity. The electron mobility of graphene films extracted from field-effect transistor measurements was found to be higher than 4000 cm(2) V(-1) s(-1) at room temperature.

Graphene films with large domain size by a two-step chemical vapor deposition process.

The fundamental properties of graphene are making it an attractive material for a wide variety of applications. Various techniques have been developed to produce graphene and recently we discovered the synthesis of large area graphene by chemical vapor deposition (CVD) of methane on Cu foils. We also showed that graphene growth on Cu is a surface-mediated process and the films were polycrystalline with domains having an area of tens of square micrometers. In this paper, we report on the effect of growth parameters such as temperature, and methane flow rate and partial pressure on the growth rate, domain size, and surface coverage of graphene as determined by Raman spectroscopy, and transmission and scanning electron microscopy. On the basis of the results, we developed a two-step CVD process to synthesize graphene films with domains having an area of hundreds of square micrometers. Scanning electron microscopy and Raman spectroscopy clearly show an increase in domain size by changing the growth parameters. Transmission electron microscopy further shows that the domains are crystallographically rotated with respect to each other with a range of angles from about 13 to nearly 30°. Electrical transport measurements performed on back-gated FETs show that overall films with larger domains tend to have higher carrier mobility up to about 16,000 cm(2) V(-1) s(-1) at room temperature.

Enhanced channel modulation in dual-gated silicon nanowire transistors.

Dual-gated silicon nanowire (SiNW) field-effect transistors (FETs) have been fabricated by using electron-beam lithography. SiNW devices (W approximately 60 nm) exhibit an on/off current ratio greater than 10(6), which is more than 3 orders of magnitude higher than that of control devices prepared simultaneously having a large channel width (approximately 5 microm). In addition, by changing the local energy-band profile of the SiNW channel, the top gate is found to suppress ambipolar conduction effectively, which is one of the factors limiting the use of nanotube or nanowire FETs for complimentary logic applications. Two-dimensional numerical simulations show that the gate-induced electrostatic control is improved as the channel width of the FETs decreases. Therefore, enhanced channel modulations can be achieved in these dual-gated SiNW devices.