Anomalous random telegraph noise in nanoscale transistors as direct evidence of two metastable states of oxide traps.

In this paper, a new pattern of anomalous random telegraph noise (RTN), named "reversal RTN" (rRTN) induced by single oxide trap, is observed in the drain current of nanoscale metal-oxide-semiconductor field-effect transistors (MOSFETs) with high-k gate dielectrics. Under each gate voltage, the rRTN data exhibit two zones with identical amplitudes but reversal time constants. This abnormal switching behavior can be explained by the theory of complete 4-state trap model (with two stable states and two metastable states), rather than the simple 2-state or improved 3-state trap model. The results provide a direct experimental evidence of the existence of two metastable states in a single oxide trap, contributing to the comprehensive understanding of trap-related reliability and variability issues in nanoscale transistors.

Modulation of nonlinear resistive switching behavior of a TaOx-based resistive device through interface engineering.

A resistive switching device with inherent nonlinear characteristics through a delicately engineered interfacial layer is an ideal component to be integrated into passive crossbar arrays for the suppression of sneaking current, especially in ultra-dense 3D integration. In this paper, we demonstrated a TaOx-based bipolar resistive switching device with a nearly symmetrical bi-directional nonlinear feature through interface engineering. This was accomplished by introducing an ultra-thin interfacial layer (SiO2-x) with unique features, including a large band gap and a certain level of negative heat of oxide formation between the top electrode (TiN) and resistive layer (TaOx). The devices exhibit excellent nonlinear property under both positive and negative bias. Modulation of the inherent nonlinearity as well as the resistive switching mechanism are comprehensively studied by scrutinizing the results of the experimental control groups and the extensive characterizations including detailed compositional analysis, which suggests that the underlying mechanism of the nonlinear behavior is associatively governed by the serially connected metallic conductive filament and Flower-Nordheim tunneling barrier formed by the SiO2-x interface layer. The proposed device in this work has great potential to be implemented in future massive storage memory applications of high-density selector-free crossbar structure.

Engineering incremental resistive switching in TaOx based memristors for brain-inspired computing.

Brain-inspired neuromorphic computing is expected to revolutionize the architecture of conventional digital computers and lead to a new generation of powerful computing paradigms, where memristors with analog resistive switching are considered to be potential solutions for synapses. Here we propose and demonstrate a novel approach to engineering the analog switching linearity in TaOx based memristors, that is, by homogenizing the filament growth/dissolution rate via the introduction of an ion diffusion limiting layer (DLL) at the TiN/TaOx interface. This has effectively mitigated the commonly observed two-regime conductance modulation behavior and led to more uniform filament growth (dissolution) dynamics with time, therefore significantly improving the conductance modulation linearity that is desirable in neuromorphic systems. In addition, the introduction of the DLL also served to reduce the power consumption of the memristor, and important synaptic learning rules in biological brains such as spike timing dependent plasticity were successfully implemented using these optimized devices. This study could provide general implications for continued optimizations of memristor performance for neuromorphic applications, by carefully tuning the dynamics involved in filament growth and dissolution.

High performance tunnel field-effect transistor by gate and source engineering.

As one of the most promising candidates for future nanoelectronic devices, tunnel field-effect transistors (TFET) can overcome the subthreshold slope (SS) limitation of MOSFET, whereas high ON-current, low OFF-current and steep switching can hardly be obtained at the same time for experimental TFETs. In this paper, we developed a new nanodevice technology based on TFET concepts. By designing the gate configuration and introducing the optimized Schottky junction, a multi-finger-gate TFET with a dopant-segregated Schottky source (mFSB-TFET) is proposed and experimentally demonstrated. A steeper SS can be achieved in the fabricated mFSB-TFET on the bulk Si substrate benefiting from the coupled quantum band-to-band tunneling (BTBT) mechanism, as well as a high I(ON)/I(OFF) ratio (∼ 10(7)) at V(DS) = 0.2 V without an area penalty. By compatible SOI CMOS technology, the fabricated Si mFSB-TFET device was further optimized with a high ION/IOFF ratio of ∼ 10(8) and a steeper SS of over 5.5 decades of current. A minimum SS of below 60 mV dec(-1) was experimentally obtained, indicating its dominant quantum BTBT mechanism for switching.

Top-down fabrication of vertical silicon nano-rings based on Poisson diffraction.

Vertical Si nano-rings with a uniform thickness of about 100 nm have been fabricated by conventional optical photolithography with a low cost based on Poisson diffraction. Moreover, the roughness of the Si nano-rings can be effectively reduced by sacrificial oxidation. In order to increase the density of the nano-rings, coaxial twin Si nano-rings have been fabricated by the Poisson diffraction method combined with the spacer technique. The thickness of both the inner and outer Si nano-rings is about 60 nm, and the gap between the twin nano-rings is about 100 nm.