Nanosheet integration of induced tunnel field-effect transistor with lower cost and lower power.

Nanosheet transistors are poised to become the preferred choice for the next generation of smaller-sized devices in the future. To address the future demand for high-performance and low-power computing applications, this study proposes a nanosheet structure with a vertically stacked design, featuring a high ION/IOFF ratio. This Nanosheet design is combined with an induced tunnel field-effect transistor. By utilizing SiGe with a carrier mobility three times that of Si and employing a line tunneling mechanism, the research successfully achieves superior Band to Band characteristics, resulting in improved switching behavior and a lower Subthreshold Swing (SS). Comparative studies were conducted on three TFET types: Nanosheet PIN TFET, Nanosheet Schottky iTFET, and Fin iTFET. Results show that the Nanosheet PIN TFET has a higher ION/IOFF ratio but poorer SSavg values at 47.63 mV/dec compared to the others. However, with a SiGe Body thickness of 3 nm, both Nanosheet iTFET and Fin iTFET exhibit higher ION/IOFF ratios and superior SSavg values at 17.64 mV/dec. These findings suggest the potential of Nanosheet iTFET and Fin iTFET for low-power, lower thermal budgets, and fast-switching applications.

Leakage and Thermal Reliability Optimization of Stacked Nanosheet Field-Effect Transistors with SiC Layers.

In this work, we propose a SiC-NSFET structure that uses a PTS scheme only under the gate, with SiC layers under the source and drain, to improve the leakage current and thermal reliability. Punch-through stopper (PTS) doping is widely used to suppress the leakage current, but aggressively high PTS doping will cause additional band-to-band (BTBT) current. Therefore, the bottom oxide isolation nanosheet field-effect transistor (BOX-NSFET) can further reduce the leakage current and become an alternative to conventional structures with PTS. However, thermal reliability issues, like bias temperature instability (BTI), hot carrier injection (HCI), and time-dependent dielectric breakdown (TDDB), induced by the self-heating effect (SHE) of BOX-NSFET, become more profound due to the lower thermal conductivity of SiO2 than silicon. Moreover, the bottom oxide will reduce the stress along the channel due to the challenges associated with growing high-quality SiGe material on SiO2. Therefore, this method faces difficulties in enhancing the mobility of p-type devices. The comprehensive TCAD simulation results show that SiC-NSFET significantly suppresses the substrate leakage current compared to the conventional structure with PTS. In addition, compared to the BOX-NSFET, the stress reduction caused by the bottom oxide is avoided, and the SHE is mitigated. This work provides significant design guidelines for leakage and thermal reliability optimization of next-generation advanced nodes.

Electrostatically Doped Junctionless Graphene Nanoribbon Tunnel Field-Effect Transistor for High-Performance Gas Sensing Applications: Leveraging Doping Gates for Multi-Gas Detection.

In this paper, a new junctionless graphene nanoribbon tunnel field-effect transistor (JLGNR TFET) is proposed as a multi-gas nanosensor. The nanosensor has been computationally assessed using a quantum simulation based on the self-consistent solutions of the mode space non-equilibrium Green's function (NEGF) formalism coupled with the Poisson's equation considering ballistic transport conditions. The proposed multi-gas nanosensor is endowed with two top gates ensuring both reservoirs' doping and multi-gas sensing. The investigations have included the IDS-VGS transfer characteristics, the gas-induced electrostatic modulations, subthreshold swing, and sensitivity. The order of change in drain current has been considered as a sensitivity metric. The underlying physics of the proposed JLGNR TFET-based multi-gas nanosensor has also been studied through the analysis of the band diagrams behavior and the energy-position-resolved current spectrum. It has been found that the gas-induced work function modulation of the source (drain) gate affects the n-type (p-type) conduction branch by modulating the band-to-band tunneling (BTBT) while the p-type (n-type) conduction branch still unaffected forming a kind of high selectivity from operating regime point of view. The high sensitivity has been recorded in subthermionic subthreshold swing (SS < 60 mV/dec) regime considering small gas-induced gate work function modulation. In addition, advanced simulations have been performed for the detection of two different types of gases separately and simultaneously, where high-performance has been recorded in terms of sensitivity, selectivity, and electrical behavior. The proposed detection approach, which is viable, innovative, simple, and efficient, can be applied using other types of junctionless tunneling field-effect transistors with emerging channel nanomaterials such as the transition metal dichalcogenides materials. The proposed JLGNRTFET-based multi-gas nanosensor is not limited to two specific gases but can also detect other gases by employing appropriate gate materials in terms of selectivity.

Assessment of the Biosensing Capabilities of SiGe Heterojunction Negative Capacitance-Vertical Tunnel Field-Effect Transistor.

In this study, a comparison of the negative capacitance vertical tunnel field-effect transistor (NC-VTFET) and VTFET for biosensing applications was conducted. Dielectrically modulated TFET demonstrates better sensitivity than the traditional metal oxide field effect transistor as a biosensor in label-free biosensing applications. The TFET biosensor, however, has much room for advancement by enhancing its DC characteristics. This research addresses the impact of ferroelectric gate oxide for integration of negative capacitance (NC) effect with the SiGe heterojunction pocket at the source-channel junction to enhance performance for biosensor applications. By putting the NC layer over SiO2, the channel voltage increases with decreased subthreshold slope and OFF current, thereby creating an NC effect. Because SiGe has a narrow band gap, pocket doping of SiGe near the source channel junction will increase the concentration of charge carriers, improving the band-to-band tunneling. In order to aid in the integration of biomolecules and to modulate band-to-band tunneling based on charge density (qf), dielectric constant (k), temperature, and cavity length, a cavity is additionally inserted above the source channel junction and underneath the NC layer, near to SiO2. These values were compared with and without the incorporation of NC layer with respect to various electrical properties such as drain current (Id), sensitivity, and electric field (E). According to the findings, labeled and label-free biosensors' sensitivity may be increased by incorporating the NC effect into VTFET biosensors.

Electrically Doped PNPN Tunnel Field-Effect Transistor Using Dual-Material Polarity Gate with Improved DC and Analog/RF Performance.

A new structure for PNPN tunnel field-effect transistors (TFETs) has been designed and simulated in this work. The proposed structure incorporates the polarity bias concept and the gate work function engineering to improve the DC and analog/RF figures of merit. The proposed device consists of a control gate (CG) and a polarity gate (PG), where the PG uses a dual-material gate (DMG) structure and is biased at -0.7 V to induce a P+ region in the source. The PNPN structure introduces a local minimum on the conduction band edge curve at the tunneling junction, which dramatically reduces the tunneling width. Furthermore, we show that incorporating the DMG architecture further enhances the drive current and improves the subthreshold slope (SS) characteristics by introducing an additional electric field peak. The numerical simulation reveals that the electrically doped PNPN TFET using DMG improves the DC and analog/RF performances in comparison to a conventional single-material gate (SMG) device.

Performance Assessment of a Junctionless Heterostructure Tunnel FET Biosensor Using Dual Material Gate.

Biosensors based on tunnel FET for label-free detection in which a nanogap is introduced under gate electrode to electrically sense the characteristics of biomolecules, have been studied widely in recent years. In this paper, a new type of heterostructure junctionless tunnel FET biosensor with an embedded nanogap is proposed, in which the control gate consists of two parts, namely the tunnel gate and auxiliary gate, with different work functions; and the detection sensitivity of different biomolecules can be controlled and adjusted by the two gates. Further, a polar gate is introduced above the source region, and a P+ source is formed by the charge plasma concept by selecting appropriate work functions for the polar gate. The variation of sensitivity with different control gate and polar gate work functions is explored. Neutral and charged biomolecules are considered to simulate device-level gate effects, and the influence of different dielectric constants on sensitivity is also researched. The simulation results show that the switch ratio of the proposed biosensor can reach 109, the maximum current sensitivity is 6.91 × 102, and the maximum sensitivity of the average subthreshold swing (SS) is 0.62.

A new line tunneling SiGe/Si iTFET with control gate for leakage suppression and subthreshold swing improvement.

This article presents a new line tunneling dominating metal-semiconductor contact-induced SiGe-Si tunnel field-effect transistor with control gate (CG-Line SiGe/Si iTFET). With a structure where two symmetrical control gates at the drain region are given a sufficient negative bias, the overlap of the energy bands at the drain in the OFF-state is effectively suppressed, thus reducing the tunneling probability and significantly decreasing leakage current. Additionally, the large overlap area between the source and gate improves the gate's ability to control the tunneling interface effectively, improving the ON-state current and subthreshold swing characteristics. By using the Schottky contact characteristics of a metal-semiconductor contact with different work functions to form a PN junction, the need to control doping profiles or random doping fluctuations is avoided. Furthermore, as ion implantation is not required, issues related to subsequent annealing are also eliminated, greatly reducing thermal budget. Due to the different material bandgap characteristics selected for the source and drain regions, the probability of overlap of the energy bands in the source region in the ON-state is increased and that in the drain region in the OFF-state is reduced. Based on the feasibility of the actual fabrication process and through rigorous 2D simulation studies, improvements in subthreshold swing and high on/off current ratio can be achieved simultaneously based on the proposed device structure. Additionally, the presence of the control gate structure effectively suppresses leakage current, further enhancing its potential for low-power-consumption applications.

Single-Particle Irradiation Effect and Anti-Irradiation Optimization of a JLTFET with Lightly Doped Source.

In this article, the particle irradiation effect of a lightly doped Gaussian source heterostructure junctionless tunnel field-effect transistor (DMG-GDS-HJLTFET) is discussed. In the irradiation phenomenon, heavy ion produces a series of electron-hole pairs along the incident track, and then the generated transient current can overturn the logical state of the device when the number of electron-hole pairs is large enough. In the single-particle effect of DMG-GDS-HJLTFET, the carried energy is usually represented by linear energy transfer value (LET). In simulation, the effects of incident ion energy, incident angle, incident completion time, incident position and drain bias voltage on the single-particle effect of DMG-GDS-HJLTFET are investigated. On this basis, we optimize the auxiliary gate dielectric, tunneling gate length for reliability. Simulation results show HfO2 with a large dielectric constant should be selected as the auxiliary gate dielectric in the anti-irradiation design. Larger tunneling gate leads to larger peak transient drain current and smaller tunneling gate means larger pulse width; from the point of anti-irradiation, the tunneling gate length should be selected at about 10 nm.

Novel SiGe/Si Heterojunction Double-Gate Tunneling FETs with a Heterogate Dielectric for High Performance.

In this paper, a new SiGe/Si heterojunction double-gate heterogate dielectric tunneling field-effect transistor with an auxiliary tunneling barrier layer (HJ-HD-P-DGTFET) is proposed and investigated using TCAD tools. SiGe material has a smaller band gap than Si, so a heterojunction with SiGe(source)/Si(channel) can result in a smaller tunneling distance, which is very helpful in boosting the tunneling rate. The gate dielectric near the drain region consists of low-k SiO2 to weaken the gate control of the channel-drain tunneling junction and reduce the ambipolar current (Iamb). In contrast, the gate dielectric near the source region consists of high-k HfO2 to increase the on-state current (Ion) through the method of gate control. To further increase Ion, an n+-doped auxiliary tunneling barrier layer (pocket)is used to reduce the tunneling distance. Therefore, the proposed HJ-HD-P-DGTFET can obtain a higher on-state current and suppressed ambipolar effect. The simulation results show that a large Ion of 7.79 × 10-5 A/µm, a suppressed Ioff of 8.16 × 10-18 A/µm, minimum subthreshold swing (SSmin) of 19 mV/dec, a cutoff frequency (fT) of 19.95 GHz, and gain bandwidth product (GBW) of 2.07 GHz can be achieved. The data indicate that HJ-HD-P-DGTFET is a promising device for low-power-consumption radio frequency applications.

Room-Temperature Negative Differential Resistance and High Tunneling Current Density in GeSn Esaki Diodes.

Tunnel field-effect transistors (TFETs) are a promising candidate for low-power applications owing to their steep subthreshold swing of sub-60 mV per decade. For silicon- or germanium-based TFETs, the drive current is low due to the indirect band-to-band tunneling (BTBT) process. Direct-bandgap germanium-tin (GeSn) can boost the TFET performance since phonon participation is not required during the tunneling process. Esaki diodes with negative differential resistance (NDR) are used to characterize the BTBT properties and calibrate the tunneling rates for TFET applications. This work demonstrates high-performance GeSn Esaki diodes with clear NDR at room temperature with very high peak-to-valley current ratios of 15-53 from 300 K to 4 K. A record-high peak current density of 545 kA cm-2 at 4 K is also reported for the tensile-strained Ge0.925 Sn0.075 device (strain ≈0.6 %). By applying tensile stresses to n-GeSn epitaxial films, the direct BTBT process dominates, leading to high tunneling rates. Hall measurements further confirm that more electrons populate in the direct Γ valley in the tensile-strained n-GeSn epitaxial films.

A T-shaped gate tunneling field effect transistor with negative capacitance, super-steep subthreshold swing.

With the development of semiconductor technology, the size of traditional metal oxide semiconductor field effect transistor devices continues to decrease, but it cannot meet the requirements of high performance and low power consumption. Low power tunneling field effect transistor (TFET) has gradually become the focus of researchers. This paper proposes a novel T-shaped gate TFET based on the silicon with the negative capacitance (NC-TGTFET). On the basis of TGTFET, ferroelectric material (HZO) is used as gate dielectric. The simulation results show that, compared with the traditional TGTFET, the opening order and sensitivity of the two tunneling junctions are different. The influences of thickness and the doping concentration of pocket and ferroelectric material properties on the characteristics of NC-TGTFET is also discussed by Sentaurus simulation tool. Furthermore, the negative capacitance of ferroelectric material makes NC-TGTFET have a very steep subthreshold swing (18.32 mV/dec) at the range of drain current from 1 × 10-15to 1 × 10-7Aµm-1. And the on-state current (Vg= 0.5 V,Vd= 0.5 V) is 1.52 × 10-6Aµm-1.

Study of a Gate-Engineered Vertical TFET with GaSb/GaAs0.5Sb0.5 Heterojunction.

It is well known that the vertical tunnel field effect transistor (TFET) is easier to fabricate than the conventional lateral TFETs in technology. Meanwhile, a lightly doped pocket under the source region can improve the subthreshold performance of the vertical TFETs. This paper demonstrates a dual material gate heterogeneous dielectric vertical TFET (DMG-HD-VTFET) with a lightly doped source-pocket. The proposed structure adopts a GaSb/GaAs0.5Sb0.5 heterojunction at the source and pocket to improve the band-to-band tunneling (BTBT) rate; at the same time, the gate electrode is divided into two parts, namely a tunnel gate (M1) and control gate (M2) with work functions ΦM1 and ΦM2, where ΦM1 > ΦM2. In addition, further performance enhancement in the proposed device is realized by a heterogeneous dielectric corresponding to a dual material gate. Simulation results indicate that DMG-HD-VTFET and HD-VTFET possess superior metrics in terms of DC (Direct Current) and RF (Radio Frequency) performance as compared with conventional VTFET. As a result, the ON-state current of 2.92 × 10-4 A/µm, transconductance of 6.46 × 10-4 S/µm, and average subthreshold swing (SSave) of 18.1 mV/Dec at low drain voltage can be obtained. At the same time, DMG-HD-VTFET could achieve a maximum fT of 459 GHz at 0.72 V gate-to-source voltage (Vgs) and a maximum gain bandwidth (GBW) of 35 GHz at Vgs = 0.6 V, respectively. So, the proposed structure will have a great potential to boost the device performance of traditional vertical TFETs.

In-Built N+ Pocket Electrically Doped Tunnel FET With Improved DC and Analog/RF Performance.

In this paper, we present an in-built N+ pocket electrically doped tunnel FET (ED-TFET) based on the polarity bias concept that enhances the DC and analog/RF performance. The proposed device begins with a MOSFET like structure (n-p-n) with a control gate (CG) and a polarity gate (PG). The PG is biased at -0.7 V to induce a P+ region at the source side, leaving an N+ pocket between the source and the channel. This technique yields an N+ pocket that is realized in the in-built architecture and removes the need for additional chemical doping. Calibrated 2-D simulations have demonstrated that the introduction of the N+ pocket yields a higher ION and a steeper average subthreshold swing when compared to conventional ED-TFET. Further, a local minimum on the conduction band edge (EC) curve at the tunneling junction is observed, leading to a dramatic reduction in the tunneling width. As a result, the in-built N+ pocket ED-TFET significantly improves the DC and analog/RF figure-of-merits and, hence, can serve as a better candidate for low-power applications.

Improving ESD Protection Robustness Using SiGe Source/Drain Regions in Tunnel FET.

Currently, a tunnel field-effect transistor (TFET) is being considered as a suitable electrostatic discharge (ESD) protection device in advanced technology. In addition, silicon-germanium (SiGe) engineering is shown to improve the performance of TFET-based ESD protection devices. In this paper, a new TFET with SiGe source/drain (S/D) regions is proposed, and its ESD characteristics are evaluated using technology computer aided design (TCAD) simulations. Under a transmission line pulsing (TLP) stressing condition, the triggering voltage of the SiGe S/D TFET is reduced by 35% and the failure current is increased by 17% in comparison with the conventional Si S/D TFET. Physical insights relevant to the ESD enhancement of the SiGe S/D TFET are provided and discussed.

Operation Mechanism of a MoS2/BP Heterojunction FET.

The electrical characteristics and operation mechanism of a molybdenum disulfide/black phosphorus (MoS2/BP) heterojunction device are investigated herein. Even though this device showed a high on-off ratio of over 1 × 107, with a lower subthreshold swing of ~54 mV/dec and a 1fA level off current, its operating mechanism is closer to a junction field-effect transistor (FET) than a tunneling FET. The off-current of this device is governed by the depletion region in the BP layer, and the band-to-band tunneling current does not contribute to the rapid turn-on and extremely low off-current.

Design of High Performance Si/SiGe Heterojunction Tunneling FETs with a T-Shaped Gate.

In this paper, a new Si/SiGe heterojunction tunneling field-effect transistor with a T-shaped gate (HTG-TFET) is proposed and investigated by Silvaco-Atlas simulation. The two source regions of the HTG-TFET are placed on both sides of the gate to increase the tunneling area. The T-shaped gate is designed to overlap with N+ pockets in both the lateral and vertical directions, which increases the electric field and tunneling rate at the top of tunneling junctions. Moreover, using SiGe in the pocket regions leads to the smaller tunneling distance. Therefore, the proposed HTG-TFET can obtain the higher on-state current. The simulation results show that on-state current of HTG-TFET is increased by one order of magnitude compared with that of the silicon-based counterparts. The average subthreshold swing (SS) of HTG-TFET is 44.64 mV/dec when V g is varied from 0.1 to 0.4 V, and the point SS is 36.59 mV/dec at V g = 0.2 V. Besides, this design cannot bring the sever Miller capacitance for the TFET circuit design. By using the T-shaped gate and SiGe pocket regions, the overall performance of the TFET is optimized.