On-chip integrated quantum emitter with 'trap-enhance-guide': a simulation approach.

To address the challenges of developing a scalable system of an on-chip integrated quantum emitter, we propose to leverage the loss in our hybrid plasmonic-photonic structure to simultaneously achieve Purcell enhancement as well as on-chip maneuvering of nanoscale emitter via optical trapping with guided excitation-emission routes. In this report, we have analyzed the feasibility of the functional goals of our proposed system in the metric of trapping strength (∼8KBT), Purcell factor (>1000∼), and collection efficiency (∼10%). Once realized, the scopes of the proposed device can be advanced to develop a scalable platform for integrated quantum technology.