Heterogeneous density-based clustering with a dual-functional memristive array.

In the big data era, the requirement for data clustering methods that can handle massive and heterogeneous datasets with varying distributions increases. This study proposes a clustering algorithm for data sets with heterogeneous density using a dual-mode memristor crossbar array for data clustering. The array consists of a Ta/HfO2/RuO2 memristor operating in analog or digital modes, controlled by the reset voltage. The digital mode shows low dispersion and a high resistance ratio, and the analog mode enables precise conductance tuning. The local outlier factor is introduced to handle a heterogeneous density, and the required Euclidean and K-distances within the given dataset are calculated in the analog mode in parallel. In the digital mode, clustering is performed based on the connectivity among data points after excluding the detected outliers. The proposed algorithm boasts linear time complexity for the entire process. Extensive evaluations of synthetic datasets demonstrate significant improvement over representative density-based algorithms, and the datasets with heterogeneous density are clustered feasibly. Finally, the proposed algorithm is used to cluster the single-molecule localization microscopy data, demonstrating the feasibility of the suggested method for real-world problems.

Implementation of Bayesian networks and Bayesian inference using a Cu0.1Te0.9/HfO2/Pt threshold switching memristor.

Bayesian networks and Bayesian inference, which forecast uncertain causal relationships within a stochastic framework, are used in various artificial intelligence applications. However, implementing hardware circuits for the Bayesian inference has shortcomings regarding device performance and circuit complexity. This work proposed a Bayesian network and inference circuit using a Cu0.1Te0.9/HfO2/Pt volatile memristor, a probabilistic bit neuron that can control the probability of being 'true' or 'false.' Nodal probabilities within the network are feasibly sampled with low errors, even with the device's cycle-to-cycle variations. Furthermore, Bayesian inference of all conditional probabilities within the network is implemented with low power (<186 nW) and energy consumption (441.4 fJ), and a normalized mean squared error of ∼7.5 × 10-4 through division feedback logic with a variational learning rate to suppress the inherent variation of the memristor. The suggested memristor-based Bayesian network shows the potential to replace the conventional complementary metal oxide semiconductor-based Bayesian estimation method with power efficiency using a stochastic computing method.