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3D integration of III-V semiconductors with Si CMOS is highly attractive since it allows combining new functions such as photonic and analog devices with digital signal processing circuitry. Thus far, most 3D integration approaches have used epitaxial growth on Si, layer transfer by wafer bonding, or die-to-die packaging. Here we present low-temperature integration of InAs on W using Si3N4 template assisted selective area metal-organic vapor-phase epitaxy (MOVPE). Despite growth nucleation on polycrystalline W, we can obtain a high yield of single-crystalline InAs nanowires, as observed by transmission electron microscopy (TEM) and electron backscatter diffraction (EBSD). The nanowires exhibit a mobility of 690 cm2/(V s), a low-resistive, Ohmic electrical contact to the W film, and a resistivity which increases with diameter attributed to increased grain boundary scattering. These results demonstrate the feasibility for single-crystalline III-V back-end-of-line integration with a low thermal budget compatible with Si CMOS.
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Monolithic integration of III-V semiconductors with Silicon technology has instigated a wide range of new possibilities in the semiconductor industry, such as combination of digital circuits with optical sensing and high-frequency communication. A promising CMOS compatible integration process is rapid melt growth (RMG) that can yield high quality single crystalline material at low cost. This paper represents the study on ultra-thin InSb-on-insulator microstructures integrated on a Si platform by a RMG-like process. We utilize flash lamp annealing (FLA) to melt and recrystallize the InSb material for an ultra-short duration (milliseconds), to reduce the thermal budget necessary for integration with Si technology. We compare the result from FLA to regular rapid thermal annealing (seconds). Recrystallized InSb was characterized using electron back scatter diffraction which indicate a transition from nanocrystalline structure to a crystal structure with grain sizes exceeding 1 µm after the process. We further see a 100× improvement in electrical resistivity by FLA annealed sample when compared to the as-deposited InSb with an average Hall mobility of 3100 cm2 V-1 s-1 making this a promising step towards realizing monolithic mid-infrared detectors and quantum devices based on InSb.
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InGaAs is a potential candidate for Si replacement in upcoming advanced technological nodes because of its excellent electron transport properties and relatively low interface defect density in dielectric gate stacks. Therefore, integrating InGaAs devices with the established Si platforms is highly important. Using template-assisted selective epitaxy (TASE), InGaAs nanowires can be monolithically integrated with high crystal quality, although the mechanisms of group III incorporation in this ternary material have not been thoroughly investigated. Here we present a detailed study of the compositional variations of InGaAs nanostructures epitaxially grown on Si(111) and Silicon-on-insulator substrates by TASE. We present a combination of XRD data and detailed EELS maps and find that the final Ga/In chemical composition depends strongly on both growth parameters and the growth facet type, leading to complex compositional sub-structures throughout the crystals. We can further conclude that the composition is governed by the facet-dependent chemical reaction rates at low temperature and low V/III ratio, while at higher temperature and V/III ratio, the incorporation is transport limited. In this case we see indications that the transport is a competition between Knudsen flow and surface diffusion.
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Coherent interconnection of quantum bits remains an ongoing challenge in quantum information technology. Envisioned hardware to achieve this goal is based on semiconductor nanowire (NW) circuits, comprising individual NW devices that are linked through ballistic interconnects. However, maintaining the sensitive ballistic conduction and confinement conditions across NW intersections is a nontrivial problem. Here, we go beyond the characterization of a single NW device and demonstrate ballistic one-dimensional (1D) quantum transport in InAs NW cross-junctions, monolithically integrated on Si. Characteristic 1D conductance plateaus are resolved in field-effect measurements across up to four NW-junctions in series. The 1D ballistic transport and sub-band splitting is preserved for both crossing-directions. We show that the 1D modes of a single injection terminal can be distributed into multiple NW branches. We believe that NW cross-junctions are well-suited as cross-directional communication links for the reliable transfer of quantum information as required for quantum computational systems.
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We report complementary metal-oxide-semiconductor (CMOS)-compatible integration of compound semiconductors on Si substrates. InAs and GaAs nanowires are selectively grown in vertical SiO2 nanotube templates fabricated on Si substrates of varying crystallographic orientations, including nanocrystalline Si. The nanowires investigated are epitaxially grown, single-crystalline, free from threading dislocations, and with an orientation and dimension directly given by the shape of the template. GaAs nanowires exhibit stable photoluminescence at room temperature, with a higher measured intensity when still surrounded by the template. Si-InAs heterojunction nanowire tunnel diodes were fabricated on Si(100) and are electrically characterized. The results indicate a high uniformity and scalability in the fabrication process.
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Nonvolatile memory devices based on ferroelectric HfxZr1-xO2 (HZO) show great promise for back-end integrable storage and for neuromorphic accelerators, but their adoption is held back by the inability to scale down the HZO thickness without violating the strict thermal restrictions of the Si CMOS back end of line. In this work, we overcome this challenge and demonstrate the use of nanosecond pulsed laser annealing (NLA) to locally crystallize areas of an ultrathin (3.6 nm) HZO film into the ferroelectric orthorhombic phase. Meanwhile, the heat induced by the pulsed laser is confined to the layers above the Si, allowing for back-end compatible integration. We use a combination of electrical characterization, nanofocused scanning X-ray diffraction (nano-XRD), and synchrotron X-ray photoelectron spectroscopy (SXPS) to gain a comprehensive view of the change in material and interface properties by systematically varying both laser energy and the number of laser pulses on the same sample. We find that NLA can provide remanent polarization up to 2Pr= 11.6 µC/cm2 in 3.6 nm HZO, albeit with a significant wake-up effect. The improved TiN/HZO interface observed by XPS explains why device endurance goes beyond 107 cycles, whereas an identical film processed by rapid thermal processing (RTP) breaks already after 106 cycles. All in all, NLA provides a promising approach to scale down the ferroelectric oxide thickness for emerging HZO ferroelectric devices, which is key for their integration in scaled process nodes.
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Monolithic integration of InSb on Si could be a key enabler for future electronic and optoelectronic applications. In this work, we report the fabrication of InSb metal-semiconductor-metal photodetectors directly on Si using a CMOS-compatible process known as rapid melt growth. Fourier transform spectroscopy demonstrates a spectrally resolved photocurrent peak from a single crystalline InSb nanostructure with dimensions of 500 nm × 1.1 µm × 120 nm. Time-dependent optical characterization of a device under 1550 nm illumination indicated a stable photoresponse with responsivity of 0.50 A W-1 at 16 nW illumination, with a time constant in the range of milliseconds. Electron backscatter diffraction spectroscopy revealed that the single crystalline InSb nanostructures contain occasional twin defects and crystal lattice twist around the growth axis, in addition to residual strain, possibly causing the observation of a low-energy tail in the detector response extending the photosensitivity out to 10 µm wavelengths (0.12 eV) at 77 K.
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Ferroelectric memories based on hafnium oxide are an attractive alternative to conventional memory technologies due to their scalability and energy efficiency. However, there are still many open questions regarding the optimal material stack and processing conditions for reliable device performance. Here, we report on the impact of the sputtering process conditions of the commonly used TiN top electrode on the ferroelectric properties of Hf1-xZrxO2. By manipulating the deposition pressure and chemistry, we control the preferential orientation of the TiN grains between (111) and (002). We observe that (111) textured TiN is superior to (002) texturing for achieving high remanent polarization (Pr). Furthermore, we find that additional nitrogen supply during TiN deposition leads to >5× greater endurance, possibly by limiting the scavenging of oxygen from the Hf1-xZrxO2 film. These results help explain the large Pr variation reported in the literature for Hf1-xZrxO2/TiN and highlights the necessity of tuning the top electrode of the ferroelectric stack for successful device implementation.
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GaSb nanostructures integrated on Si substrates are of high interest for p-type transistors and mid-IR photodetectors. Here, we investigate the metalorganic chemical vapor deposition and properties of GaSb nanostructures monolithically integrated onto silicon-on-insulator wafers using template-assisted selective epitaxy. A high degree of morphological control allows for GaSb nanostructures with critical dimensions down to 20 nm. Detailed investigation of growth parameters reveals that the GaSb growth rate is governed by the desorption processes of an Sb surface layer and, in turn, is insensitive to changes in material transport efficiency. The GaSb crystal structure is typically zinc-blende with a low density of rotational twin defects, and even occasional twin-free structures are observed. Hall/van der Pauw measurements are conducted on 20 nm-thick GaSb nanostructures, revealing high hole mobility of 760 cm2/(V s), which matches literature values for high-quality bulk GaSb crystals. Finally, we demonstrate a process that enables cointegration of GaSb and InAs nanostructures in close vicinity on Si, a preferred material combination ideally suited for high-performance complementary III-V metal-oxide-semiconductor technology.
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Locally induced, magnetic order on the surface of a topological insulator nanowire could enable room-temperature topological quantum devices. Here we report on the realization of selective magnetic control over topological surface states on a single facet of a rectangular Bi2Te3 nanowire via a magnetic insulating Fe3O4 substrate. Low-temperature magnetotransport studies provide evidence for local time-reversal symmetry breaking and for enhanced gapping of the interfacial 1D energy spectrum by perpendicular magnetic-field components, leaving the remaining nanowire facets unaffected. Our results open up great opportunities for development of dissipation-less electronics and spintronics.