Van der Waals polarity-engineered 3D integration of 2D complementary logic.

Vertical three-dimensional integration of two-dimensional (2D) semiconductors holds great promise, as it offers the possibility to scale up logic layers in the z axis1-3. Indeed, vertical complementary field-effect transistors (CFETs) built with such mixed-dimensional heterostructures4,5, as well as hetero-2D layers with different carrier types6-8, have been demonstrated recently. However, so far, the lack of a controllable doping scheme (especially p-doped WSe2 (refs. 9-17) and MoS2 (refs. 11,18-28)) in 2D semiconductors, preferably in a stable and non-destructive manner, has greatly impeded the bottom-up scaling of complementary logic circuitries. Here we show that, by bringing transition metal dichalcogenides, such as MoS2, atop a van der Waals (vdW) antiferromagnetic insulator chromium oxychloride (CrOCl), the carrier polarity in MoS2 can be readily reconfigured from n- to p-type via strong vdW interfacial coupling. The consequential band alignment yields transistors with room-temperature hole mobilities up to approximately 425 cm2 V-1 s-1, on/off ratios reaching 106 and air-stable performance for over one year. Based on this approach, vertically constructed complementary logic, including inverters with 6 vdW layers, NANDs with 14 vdW layers and SRAMs with 14 vdW layers, are further demonstrated. Our findings of polarity-engineered p- and n-type 2D semiconductor channels with and without vdW intercalation are robust and universal to various materials and thus may throw light on future three-dimensional vertically integrated circuits based on 2D logic gates.

Sub-10 nm HfZrO ferroelectric synapse with multiple layers and different ratios for neuromorphic computing.

To break the von Neumann bottleneck, emerging non-volatile memories have gained extensive attention in hardware implementing neuromorphic computing. The device scaling with low operating voltage is of great importance for delivering a high-integrating and energy-efficient neuromorphic system. In this paper, we fabricated sub-10 nm ferroelectric capacitors based on HfZrO (HZO) film with varying HfO and ZrO components. Compared to the conventional HZO capacitors (a constant component of 1:1), the varying component ferroelectric capacitors show similar remnant polarization but a lower coercive electric field (Ec). This enables the partial domain switching processed at a lower pulse amplitude and width, which is essential for emulating typical synaptic features. In the MNIST recognition task, the accuracy of sub-10 nm ferroelectric artificial synapse can approach ∼85.83%. Our findings may provide great potential for developing next-generation neuromorphic computing-based ultra-scaled ferroelectric artificial synapses.

Ferroelectricity induced double-direction conductance modulation in HfxZr1-xO2capacitors.

The artificial synapses are basic units in the hardware implementation of neuromorphic computing, whose performances should be gradually modulated under external stimuli. The underlying mechanism of the increasing and decreasing device conductance is still unclear in the Hf0.5Zr0.5O2based synapses. In this study, the Hf0.5Zr0.5O2capacitors with different stack orders are fabricated in atomic layer deposition, whose ferroelectric properties are investigated by analyzing the capacitance-voltage and polarization-voltage curves. The enhanced ferroelectricity is found after the rapid thermal annealing treatment for all the TiN/Hf0.5Zr0.5O2/TiN, TiN/HfO2-ZrO2/TiN and TiN/ZrO2-HfO2/TiN devices. In the device with poor ferroelectricity, the conductance gradually decreases under both positive and negative identical pulse schemes, which corresponds to the gradual dissolution process of the conductive filaments established in the initial pulse. For the capacitors with strong ferroelectricity, dual-direction conductance modulation can be observed due to the partial domain switching process, which can emulate the potentiation and depression process of biological synapses.

Digital and analog functionality in monolayer AlOx-based memristors with various oxidizer sources.

Memristors with the outstanding advantages are beneficial for neuromorphic computing and next-generation storage. Realizing various resistive switching behaviors in monolayer memristors is essential for understanding the device physics and fabricating fully memristive devices. In this paper, a simple and feasible method was proposed to achieve the digital and analog resistive switching in Cu/AlOx/Ag memristors by using ozone and water precursors in atomic layer deposition. According to the characterization results of surface topography, Raman spectrum and electrical measurement, the transition between the abrupt and gradual resistive switching was ascribed to the migration and diffusion of active electrode metal ions in the sparser, rougher and more amorphous AlOx dielectric films. The key features of biological synapses including long-term potentiation/depression, paired-pulse facilitation and learning-experience behaviors were emulated in the analog monolayer memristors. This study makes an important step towards the development of the sophisticated, multi-functional, and large-scale integrated neuromorphic devices and systems.

Remote and rapid micromachining of broadband low-reflectivity black silicon surfaces by femtosecond laser filaments.

We report an approach for remote and rapid fabrication of a broadband low-reflectivity black silicon surface by ablating crystalline silicon with femtosecond laser filaments in air. Porous microstructures on the processed silicon surface are formed, resulting in a significantly enhanced light trapping efficiency in a broadband (UV-IR) spectral range. It is found that the air filament can significantly reduce the average number of adopted pulses in a normalized fabrication area and enables the processing remotely, which opens a way toward remote and rapid micromachining of optoelectronic materials by femtosecond laser filaments.

Size-dependent one-photon- and two-photon-pumped amplified spontaneous emission from organometal halide CH3NH3PbBr3 perovskite cubic microcrystals.

In the past few years, organometal halide light-emitting perovskite thin films and colloidal nanocrystals (NCs) have attracted significant research interest in the field of highly purified illuminating applications. However, knowledge of photoluminescence (PL) characteristics, such as amplified spontaneous emission (ASE) of larger-sized perovskite crystals, is still relatively scarce. Here, we presented room-temperature size-dependent spontaneous emission (SE) and ASE of the organometal halide CH3NH3PbBr3 perovskite cubic microcrystals pumped through one-photon-(1P) and two-photon-(2P) excitation paradigms. The results showed that the optical properties of SE and ASE were sensitively dependent on the sizes of perovskite microcrystals irrespective of whether 1P or 2P excitation was used. Moreover, by comparing the spectral results of 1P- and 2P-pumped experiments, 2P pumping was found to be an effective paradigm to reduce thresholds by one order of magnitude. Finally, we carried out fluences-dependent time-resolved fluorescence dynamics experiments to study the underlying effects of these scale-dependent SE and ASE. We found that the photoluminescence (PL) recombination rates sensitively became faster with increasing carriers' densities, and that the ASE pumped from larger-sized CH3NH3PbBr3 perovskite cubic microcrystals showed faster lifetimes. This work shows that micro-sized perovskite cubic crystals could be the ideal patterns of perovskite materials for realizing ASE applications in the future.

Electrochemical Deposition of Azobenzene-Containing Network Films with High-Contrast and Stable Photoresponse.

To fabricate stable photoresponsive films and devices, a cross-linked network that firmly fixes the position of the chromophores is an ideal structure, because aggregation and/or phase separation effects of chromophores in matrix can be effectively restrained in such robust films. Herein, the in situ electrochemical deposition (ED) of azo-based precursors containing multielectroactive carbazole units is utilized to construct highly cross-linked photoresponsive films. 2-(4-(9,9-bis(6-(9H-carbazol-9-yl)hexyl)-9H-fluoren-2-yl)phenyl)-1-(4-(9,9-bis(6-(9H-carbazol-9-yl)hexyl)-9H-fluoren-7-yl)phenyl)diazene (BFCzAzo) with high solvability in electrolyte solution, high electroactivity, and highly efficient photoresponsive ability is synthesized by Suzuki coupling reaction as a kind of ED precursor. A highly cross-linked photoresponsive film is fabricated by ED method using BFCzAzo as ED precursor. The film can be patterned in large area by irradiation with interfering laser beam (355 nm), and the pattern possesses excellent thermal stability and insoluble ability in both organic and inorganic solvents. Excellent reversibility of the nanostructures is demonstrated by irradiation with 550 nm laser beam.

An Efficient and Robust Partial Differential Equation Solver by Flash-Based Computing in Memory.

Flash memory-based computing-in-memory (CIM) architectures have gained popularity due to their remarkable performance in various computation tasks of data processing, including machine learning, neuron networks, and scientific calculations. Especially in the partial differential equation (PDE) solver that has been widely utilized in scientific calculations, high accuracy, processing speed, and low power consumption are the key requirements. This work proposes a novel flash memory-based PDE solver to implement PDE with high accuracy, low power consumption, and fast iterative convergence. Moreover, considering the increasing current noise in nanoscale devices, we investigate the robustness against the noise in the proposed PDE solver. The results show that the noise tolerance limit of the solver can reach more than five times that of the conventional Jacobi CIM solver. Overall, the proposed flash memory-based PDE solver offers a promising solution for scientific calculations that require high accuracy, low power consumption, and good noise immunity, which could help to develop flash-based general computing.

Flash-Based Computing-in-Memory Architecture to Implement High-Precision Sparse Coding.

To address the concerns with power consumption and processing efficiency in big-size data processing, sparse coding in computing-in-memory (CIM) architectures is gaining much more attention. Here, a novel Flash-based CIM architecture is proposed to implement large-scale sparse coding, wherein various matrix weight training algorithms are verified. Then, with further optimizations of mapping methods and initialization conditions, the variation-sensitive training (VST) algorithm is designed to enhance the processing efficiency and accuracy of the applications of image reconstructions. Based on the comprehensive characterizations observed when considering the impacts of array variations, the experiment demonstrated that the trained dictionary could successfully reconstruct the images in a 55 nm flash memory array based on the proposed architecture, irrespective of current variations. The results indicate the feasibility of using Flash-based CIM architectures to implement high-precision sparse coding in a wide range of applications.

A Gate Programmable van der Waals Metal-Ferroelectric-Semiconductor Vertical Heterojunction Memory.

Ferroelectricity, one of the keys to realize non-volatile memories owing to the remanent electric polarization, is an emerging phenomenon in the 2D limit. Yet the demonstrations of van der Waals (vdW) memories using 2D ferroelectric materials as an ingredient are very limited. Especially, gate-tunable ferroelectric vdW memristive device, which holds promises in future multi-bit data storage applications, remains challenging. Here, a gate-programmable multi-state memory is shown by vertically assembling graphite, CuInP2 S6 , and MoS2 layers into a metal(M)-ferroelectric(FE)-semiconductor(S) architecture. The resulted devices seamlessly integrate the functionality of both FE-memristor (with ON-OFF ratios exceeding 105 and long-term retention) and metal-oxide-semiconductor field effect transistor (MOS-FET). Thus, it yields a prototype of gate tunable giant electroresistance with multi-levelled ON-states in the FE-memristor in the vertical vdW assembly. First-principles calculations further reveal that such behaviors originate from the specific band alignment between the FE-S interface. Our findings pave the way for the engineering of ferroelectricity-mediated memories in future implementations of 2D nanoelectronics.

Temperature Impacts on Endurance and Read Disturbs in Charge-Trap 3D NAND Flash Memories.

Temperature effects should be well considered when designing flash-based memory systems, because they are a fundamental factor that affect both the performance and the reliability of NAND flash memories. In this work, aiming to comprehensively understanding the temperature effects on 3D NAND flash memory, triple-level-cell (TLC) mode charge-trap (CT) 3D NAND flash memory chips were characterized systematically in a wide temperature range (-30~70 °C), by focusing on the raw bit error rate (RBER) degradation during program/erase (P/E) cycling (endurance) and frequent reading (read disturb). It was observed that (1) the program time showed strong dependences on the temperature and P/E cycles, which could be well fitted by the proposed temperature-dependent cycling program time (TCPT) model; (2) RBER could be suppressed at higher temperatures, while its degradation weakly depended on the temperature, indicating that high-temperature operations would not accelerate the memory cells' degradation; (3) read disturbs were much more serious at low temperatures, while it helped to recover a part of RBER at high temperatures.