Your browser doesn't support javascript.
loading
Electrolyte-Gated Vertical Synapse Array based on Van Der Waals Heterostructure for Parallel Computing.
Oh, Seyong; Lee, Ju-Hee; Seo, Seunghwan; Choo, Hyongsuk; Lee, Dongyoung; Cho, Jeong-Ick; Park, Jin-Hong.
Afiliación
  • Oh S; Department of Electrical and Computer Engineering, Sungkyunkwan University, Suwon, 16419, Korea.
  • Lee JH; Department of Electrical and Computer Engineering, Sungkyunkwan University, Suwon, 16419, Korea.
  • Seo S; Department of Electrical and Computer Engineering, Sungkyunkwan University, Suwon, 16419, Korea.
  • Choo H; Department of Electrical and Computer Engineering, Sungkyunkwan University, Suwon, 16419, Korea.
  • Lee D; Department of Electrical and Computer Engineering, Sungkyunkwan University, Suwon, 16419, Korea.
  • Cho JI; Department of Electrical and Computer Engineering, Sungkyunkwan University, Suwon, 16419, Korea.
  • Park JH; Department of Electrical and Computer Engineering, Sungkyunkwan University, Suwon, 16419, Korea.
Adv Sci (Weinh) ; 9(6): e2103808, 2022 02.
Article en En | MEDLINE | ID: mdl-34957687

Texto completo: 1 Colección: 01-internacional Banco de datos: MEDLINE Idioma: En Revista: Adv Sci (Weinh) Año: 2022 Tipo del documento: Article

Texto completo: 1 Colección: 01-internacional Banco de datos: MEDLINE Idioma: En Revista: Adv Sci (Weinh) Año: 2022 Tipo del documento: Article