Bias spectroscopy and simultaneous single-electron transistor charge state detection of Si:P double dots.

We report a detailed study of low-temperature (mK) transport properties of a silicon double-dot system fabricated by phosphorous ion implantation. The device under study consists of two phosphorous nanoscale islands doped to above the metal-insulator transition, separated from each other and the source and drain reservoirs by nominally undoped (intrinsic) silicon tunnel barriers. Metallic control gates, together with an Al-AlO(x) single-electron transistor (SET), were positioned on the substrate surface, capacitively coupled to the buried dots. The individual double-dot charge states were probed using source-drain bias spectroscopy combined with non-invasive SET charge sensing. The system was measured in linear (source-drain DC bias V(SD) = 0) and non-linear (V(SD) ≠ 0) regimes, allowing calculations of the relevant capacitances. Simultaneous detection using both SET sensing and source-drain current measurements was demonstrated, providing a valuable combination for the analysis of the system. Evolution of the triple points with applied bias was observed using both charge and current sensing. Coulomb diamonds, showing the interplay between the Coulomb charging effects of the two dots, were measured using simultaneous detection and compared with numerical simulations.

The use of etched registration markers to make four-terminal electrical contacts to STM-patterned nanostructures.

We demonstrate the use of etched registration markers for the alignment of four-terminal ex situ macroscopic contacts created by conventional optical lithography to buried nanoscale Si:P devices, patterned by hydrogen-based scanning tunnelling microscope (STM) lithography. Using SiO(2) as a mask we are able to protect the silicon surface from contamination during marker fabrication and can achieve atomically flat surfaces with atomic-resolution imaging. The registration markers are shown to withstand substrate heating to approximately 1200 degrees C and epitaxial overgrowth of approximately 25 nm Si. Using a scanning electron microscope to position the STM tip with respect to the markers, we can achieve alignment accuracies of approximately 100 nm, which allows us to contact buried Si:P structures. We have applied this technique to fabricate P-doped wires of different widths and measured their I-V characteristics at 4 K, finding ohmic behaviour down to a width of approximately 27 nm.

Progress in silicon-based quantum computing.

We review progress at the Australian Centre for Quantum Computer Technology towards the fabrication and demonstration of spin qubits and charge qubits based on phosphorus donor atoms embedded in intrinsic silicon. Fabrication is being pursued via two complementary pathways: a 'top-down' approach for near-term production of few-qubit demonstration devices and a 'bottom-up' approach for large-scale qubit arrays with sub-nanometre precision. The 'top-down' approach employs a low-energy (keV) ion beam to implant the phosphorus atoms. Single-atom control during implantation is achieved by monitoring on-chip detector electrodes, integrated within the device structure. In contrast, the 'bottom-up' approach uses scanning tunnelling microscope lithography and epitaxial silicon overgrowth to construct devices at an atomic scale. In both cases, surface electrodes control the qubit using voltage pulses, and dual single-electron transistors operating near the quantum limit provide fast read-out with spurious-signal rejection.