Hardware-efficient variational quantum eigensolver for small molecules and quantum magnets.

Quantum computers can be used to address electronic-structure problems and problems in materials science and condensed matter physics that can be formulated as interacting fermionic problems, problems which stretch the limits of existing high-performance computers. Finding exact solutions to such problems numerically has a computational cost that scales exponentially with the size of the system, and Monte Carlo methods are unsuitable owing to the fermionic sign problem. These limitations of classical computational methods have made solving even few-atom electronic-structure problems interesting for implementation using medium-sized quantum computers. Yet experimental implementations have so far been restricted to molecules involving only hydrogen and helium. Here we demonstrate the experimental optimization of Hamiltonian problems with up to six qubits and more than one hundred Pauli terms, determining the ground-state energy for molecules of increasing size, up to BeH2. We achieve this result by using a variational quantum eigenvalue solver (eigensolver) with efficiently prepared trial states that are tailored specifically to the interactions that are available in our quantum processor, combined with a compact encoding of fermionic Hamiltonians and a robust stochastic optimization routine. We demonstrate the flexibility of our approach by applying it to a problem of quantum magnetism, an antiferromagnetic Heisenberg model in an external magnetic field. In all cases, we find agreement between our experiments and numerical simulations using a model of the device with noise. Our results help to elucidate the requirements for scaling the method to larger systems and for bridging the gap between key problems in high-performance computing and their implementation on quantum hardware.

Suppression of Unwanted ZZ Interactions in a Hybrid Two-Qubit System.

Mitigating crosstalk errors, whether classical or quantum mechanical, is critically important for achieving high-fidelity entangling gates in multiqubit circuits. For weakly anharmonic superconducting qubits, unwanted ZZ interactions can be suppressed by combining qubits with opposite anharmonicity. We present experimental measurements and theoretical modeling of two-qubit gate error for gates based on the cross resonance interaction between a capacitively shunted flux qubit and a transmon, and demonstrate the elimination of the ZZ interaction.

Demonstration of Weight-Four Parity Measurements in the Surface Code Architecture.

We present parity measurements on a five-qubit lattice with connectivity amenable to the surface code quantum error correction architecture. Using all-microwave controls of superconducting qubits coupled via resonators, we encode the parities of four data qubit states in either the X or the Z basis. Given the connectivity of the lattice, we perform a full characterization of the static Z interactions within the set of five qubits, as well as dynamical Z interactions brought along by single- and two-qubit microwave drives. The parity measurements are significantly improved by modifying the microwave two-qubit gates to dynamically remove nonideal Z errors.

High-performance superconducting quantum processors via laser annealing of transmon qubits.

Scaling the number of qubits while maintaining high-fidelity quantum gates remains a key challenge for quantum computing. Presently, superconducting quantum processors with >50 qubits are actively available. For these systems, fixed-frequency transmons are attractive because of their long coherence and noise immunity. However, scaling fixed-frequency architectures proves challenging because of precise relative frequency requirements. Here, we use laser annealing to selectively tune transmon qubits into desired frequency patterns. Statistics over hundreds of annealed qubits demonstrate an empirical tuning precision of 18.5 MHz, with no measurable impact on qubit coherence. We quantify gate error statistics on a tuned 65-qubit processor, with median two-qubit gate fidelity of 98.7%. Baseline tuning statistics yield a frequency-equivalent resistance precision of 4.7 MHz, sufficient for high-yield scaling beyond 103 qubit levels. Moving forward, we anticipate selective laser annealing to play a central role in scaling fixed-frequency architectures.

Active protection of a superconducting qubit with an interferometric Josephson isolator.

Nonreciprocal microwave devices play critical roles in high-fidelity, quantum-nondemolition (QND) measurement schemes. They impose unidirectional routing of readout signals and protect the quantum systems from unwanted noise originated by the output chain. However, cryogenic circulators and isolators are disadvantageous in scalable superconducting architectures because they use magnetic materials and strong magnetic fields. Here, we realize an active isolator formed by coupling two nondegenerate Josephson mixers in an interferometric scheme and driving them with phase-shifted, same-frequency pumps. By incorporating our Josephson-based isolator into a superconducting qubit setup, we demonstrate fast, high-fidelity, QND measurements of the qubit while providing 20 dB of protection within a bandwidth of 10 MHz against amplified noise reflected off the Josephson amplifier in the output chain. A moderate reduction of 35% is observed in T2E when the Josephson-based isolator is turned on. Such a moderate degradation can be mitigated by minimizing heat dissipation in the pump lines.

Wafer-scale integration of sacrificial nanofluidic chips for detecting and manipulating single DNA molecules.

Wafer-scale fabrication of complex nanofluidic systems with integrated electronics is essential to realizing ubiquitous, compact, reliable, high-sensitivity and low-cost biomolecular sensors. Here we report a scalable fabrication strategy capable of producing nanofluidic chips with complex designs and down to single-digit nanometre dimensions over 200 mm wafer scale. Compatible with semiconductor industry standard complementary metal-oxide semiconductor logic circuit fabrication processes, this strategy extracts a patterned sacrificial silicon layer through hundreds of millions of nanoscale vent holes on each chip by gas-phase Xenon difluoride etching. Using single-molecule fluorescence imaging, we demonstrate these sacrificial nanofluidic chips can function to controllably and completely stretch lambda DNA in a two-dimensional nanofluidic network comprising channels and pillars. The flexible nanofluidic structure design, wafer-scale fabrication, single-digit nanometre channels, reliable fluidic sealing and low thermal budget make our strategy a potentially universal approach to integrating functional planar nanofluidic systems with logic circuits for lab-on-a-chip applications.

Nanoscale lateral displacement arrays for the separation of exosomes and colloids down to 20†nm.

Deterministic lateral displacement (DLD) pillar arrays are an efficient technology to sort, separate and enrich micrometre-scale particles, which include parasites, bacteria, blood cells and circulating tumour cells in blood. However, this technology has not been translated to the true nanoscale, where it could function on biocolloids, such as exosomes. Exosomes, a key target of 'liquid biopsies', are secreted by cells and contain nucleic acid and protein information about their originating tissue. One challenge in the study of exosome biology is to sort exosomes by size and surface markers. We use manufacturable silicon processes to produce nanoscale DLD (nano-DLD) arrays of uniform gap sizes ranging from 25 to 235 nm. We show that at low Péclet (Pe) numbers, at which diffusion and deterministic displacement compete, nano-DLD arrays separate particles between 20 to 110 nm based on size with sharp resolution. Further, we demonstrate the size-based displacement of exosomes, and so open up the potential for on-chip sorting and quantification of these important biocolloids.

Fabrication of sub-20 nm nanopore arrays in membranes with embedded metal electrodes at wafer scales.

We introduce a method to fabricate solid-state nanopores with sub-20 nm diameter in membranes with embedded metal electrodes across a 200 mm wafer using CMOS compatible semiconductor processes. Multi-layer (metal-dielectric) structures embedded in membranes were demonstrated to have high uniformity (± 0.5 nm) across the wafer. Arrays of nanopores were fabricated with an average size of 18 ± 2 nm in diameter using a Reactive Ion Etching (RIE) method in lieu of TEM drilling. Shorts between the membrane-embedded metals were occasionally created after pore formation, but the RIE based pores had a much better yield (99%) of unshorted electrodes compared to TEM drilled pores (<10%). A double-stranded DNA of length 1 kbp was translocated through the multi-layer structure RIE-based nanopore demonstrating that the pores were open. The ionic current through the pore can be modulated with a gain of 3 using embedded electrodes functioning as a gate in 0.1 mM KCl aqueous solution. This fabrication approach can potentially pave the way to manufacturable nanopore arrays with the ability to electrically control the movement of single or double-stranded DNA inside the pore with embedded electrodes.

Single-electron force readout of nanoparticle electrometers attached to carbon nanotubes.

We introduce a new technique of probing the local potential inside a nanostructure employing Au nanoparticles as electrometers and using single-electron force microscopy to sense the charge states of the Au electrometers, which are sensitive to local potential variations. The Au nanoelectrometers are weakly coupled to a carbon nanotube through high-impedance molecular junctions. We demonstrate the operation of the Au nanoelectrometer, determine the impedance of the molecular junctions, and measure the local potential profile in a looped nanotube.

Coulomb oscillations and Hall effect in quasi-2D graphite quantum dots.

We perform low-temperature electrical transport measurements on gated, quasi-2D graphite quantum dots. In devices with low contact resistances, we use longitudinal and Hall resistances to extract carrier densities of 9.2-13 x 10(12) cm(-2) and mobilities of 200-1900 cm(2)/V.s. In devices with high resistance contacts, we observe Coulomb blockade phenomena and infer the charging energies and capacitive couplings. These experiments demonstrate that electrons in mesoscopic graphite pieces are delocalized over nearly the whole graphite piece down to low temperatures.

Tuning carbon nanotube band gaps with strain.

We show that the band structure of a carbon nanotube (NT) can be dramatically altered by mechanical strain. We employ an atomic force microscope tip to simultaneously vary the NT strain and to electrostatically gate the tube. We show that strain can open a band gap in a metallic NT and modify the band gap in a semiconducting NT. Theoretical work predicts that band gap changes can range between +/-100 meV per 1% stretch, depending on NT chirality, and our measurements are consistent with this predicted range.

High-kappa dielectrics for advanced carbon-nanotube transistors and logic gates.

The integration of materials having a high dielectric constant (high-kappa) into carbon-nanotube transistors promises to push the performance limit for molecular electronics. Here, high-kappa (approximately 25) zirconium oxide thin-films (approximately 8 nm) are formed on top of individual single-walled carbon nanotubes by atomic-layer deposition and used as gate dielectrics for nanotube field-effect transistors. The p-type transistors exhibit subthreshold swings of S approximately 70 mV per decade, approaching the room-temperature theoretical limit for field-effect transistors. Key transistor performance parameters, transconductance and carrier mobility reach 6,000 S x m(-1) (12 microS per tube) and 3,000 cm2 x V(-1) x s(-1) respectively. N-type field-effect transistors obtained by annealing the devices in hydrogen exhibit S approximately 90 mV per decade. High voltage gains of up to 60 are obtained for complementary nanotube-based inverters. The atomic-layer deposition process affords gate insulators with high capacitance while being chemically benign to nanotubes, a key to the integration of advanced dielectrics into molecular electronics.