Silicon-van der Waals heterointegration for CMOS-compatible logic-in-memory design.

Silicon CMOS-based computing-in-memory encounters design and power challenges, especially in logic-in-memory scenarios requiring nonvolatility and reconfigurability. Here, we report a universal design for nonvolatile reconfigurable devices featuring a 2D/3D heterointegrated configuration. By leveraging the photo-controlled charge trapping/detrapping process and the partially top-gated energy band landscape, the van der Waals heterostacking achieves polarity storage and logic reconfigurable characteristics, respectively. Precise polarity tunability, logic nonvolatility, robustness against high temperature (at 85°C), and near-ideal subthreshold swing (80 mV dec-1) can be done. A comprehensive investigation of dynamic charge fluctuations provides a holistic understanding of the origins of nonvolatile reconfigurability (a trap level of 1013 cm-2 eV-1). Furthermore, we cascade such nonvolatile reconfigurable units into a monolithic circuit layer to demonstrate logic-in-memory computing possibilities, such as high-gain (65 at Vdd = 0.5 V) logic gates. This work provides an innovative 3D heterointegration prototype for future computing-in-memory hardware.

Reversible Charge-Polarity Control for Multioperation-Mode Transistors Based on van der Waals Heterostructures.

Van der Waals (vdW) heterostructures-in which layered materials are purposely selected to assemble with each other-allow unusual properties and different phenomena to be combined and multifunctional electronics to be created, opening a new chapter for the spread of internet-of-things applications. Here, an O2 -ultrasensitive MoTe2 material and an O2 -insensitive SnS2 material are integrated to form a vdW heterostructure, allowing the realization of charge-polarity control for multioperation-mode transistors through a simple and effective rapid thermal annealing strategy under dry-air and vacuum conditions. The charge-polarity control (i.e., doping and de-doping processes), which arises owing to the interaction between O2 adsorption/desorption and tellurium defects at the MoTe2 surface, means that the MoTe2 /SnS2 heterostructure transistors can reversibly change between unipolar, ambipolar, and anti-ambipolar transfer characteristics. Based on the dynamic control of the charge-polarity properties, an inverter, output polarity controllable amplifier, p-n diode, and ternary-state logics (NMIN and NMAX gates) are demonstrated, which inspire the development of reversibly multifunctional devices and indicates the potential of 2D materials.

Diffused Beam Energy to Dope van der Waals Electronics and Boost Their Contact Barrier Lowering.

Contact engineering of two-dimensional semiconductors is a central issue for performance improvement of micro-/nanodevices based on these materials. Unfortunately, the various methods proposed to improve the Schottky barrier height normally require the use of high temperatures, chemical dopants, or complex processes. This work demonstrates that diffused electron beam energy (DEBE) treatment can simultaneously reduce the Schottky barrier height and enable the direct writing of electrical circuitry on van der Waals semiconductors. The electron beam energy projected into the region outside the electrode diffuses into the main channel, producing selective-area n-type doping in a layered MoTe2 (or MoS2) field-effect transistor. As a result, the Schottky barrier height at the interface between the electrode and the DEBE-treated MoTe2 channel is as low as 12 meV. Additionally, because selective-area doping is possible, DEBE can allow the formation of both n- and p-type doped channels within the same atomic plane, which enables the creation of a nonvolatile and homogeneous MoTe2 p-n rectifier with an ideality factor of 1.1 and a rectification ratio of 1.3 × 103. These results indicate that the DEBE method is a simple, efficient, mask-free, and chemical dopant-free approach to selective-area doping for the development of van der Waals electronics with excellent device performances.

Facile and Reversible Carrier-Type Manipulation of Layered MoTe2 Toward Long-Term Stable Electronics.

Flexible manipulation of the carrier transport behaviors in two-dimensional materials determines their values of practical application in logic circuits. Here, we demonstrated the carrier-type manipulation in field-effect transistors (FETs) containing α-phase molybdenum ditelluride (MoTe2) by a rapid thermal annealing (RTA) process in dry air for hole-dominated and electron-beam (EB) treatment for electron-dominated FETs. EB treatment induced a distinct shift of the transfer curve by around 135 V compared with that of the FET-processed RTA treatment, indicating that the carrier density of the EB-treated FET was enhanced by about 1 order of magnitude. X-ray photoelectron spectroscopy analysis revealed that the atomic ratio of Te decreased from 66.4 to 60.8% in the MoTe2 channel after EB treatment. The Fermi level is pinned near the new energy level resulting from the Te vacancies produced by the EB process, leading to the electron-dominant effect of the MoTe2 FET. The electron-dominated MoTe2 FET showed excellent stability for more than 700 days. Thus, we not only realized the reversible modulation of carrier-type in layered MoTe2 FETs but also demonstrated MoTe2 channels with desirable performance, including long-term stability.

Oxidation-boosted charge trapping in ultra-sensitive van der Waals materials for artificial synaptic features.

Exploitation of the oxidation behaviour in an environmentally sensitive semiconductor is significant to modulate its electronic properties and develop unique applications. Here, we demonstrate a native oxidation-inspired InSe field-effect transistor as an artificial synapse in device level that benefits from the boosted charge trapping under ambient conditions. A thin InOx layer is confirmed under the InSe channel, which can serve as an effective charge trapping layer for information storage. The dynamic characteristic measurement is further performed to reveal the corresponding uniform charge trapping and releasing process, which coincides with its surface-effect-governed carrier fluctuations. As a result, the oxide-decorated InSe device exhibits nonvolatile memory characteristics with flexible programming/erasing operations. Furthermore, an InSe-based artificial synapse is implemented to emulate the essential synaptic functions. The pattern recognition capability of the designed artificial neural network is believed to provide an excellent paradigm for ultra-sensitive van der Waals materials to develop electric-modulated neuromorphic computation architectures.