Surface Acoustic Wave Resonators for Wireless Sensor Network Applications in the 433.92 MHz ISM Band.

Surface acoustic wave (SAW) resonators are low cost devices that can operate wirelessly on a received radio frequency (RF) signal with no requirement for an additional power source. Multiple SAW resonators operating as transponders that form a wireless sensor network (WSN), often need to operate at tightly spaced, different frequencies inside the industrial, scientific and medical (ISM) bands. This requires nanometer precision in the design and fabrication processes. Here, we present results demonstrating a reliable and repeatable fabrication process that yields at least four arrays on a single 4-inch wafer. Each array consists of four single-port resonators with center frequencies allocated inside four different sub-bands that have less than 50 kHz bandwidth and quality factors exceeding 8000. We see promise of standard, low-cost photolithography techniques being used to fabricate multiple SAW resonators with different center resonances all inside the 433.05 MHz-434.79 MHz ISM band and a mere 100 kHz spacing. We achieved that by leveraging the intrinsic process variation of photolithography and the impact of the metallization ratio and metal thickness in rendering distinct resonant frequencies.

Compliance-free, analog RRAM devices based on SnOx.

Brain-inspired resistive random-access memory (RRAM) technology is anticipated to outperform conventional flash memory technology due to its performance, high aerial density, low power consumption, and cost. For RRAM devices, metal oxides are exceedingly investigated as resistive switching (RS) materials. Among different oxides, tin oxide (SnOx) received minimal attention, although it possesses excellent electronic properties. Herein, we demonstrate compliance-free, analog resistive switching behavior with several stable states in Ti/Pt/SnOx/Pt RRAM devices. The compliance-free nature might be due to the high internal resistance of SnOx films. The resistance of the films was modulated by varying Ar/O2 ratio during the sputtering process. The I-V characteristics revealed a well-expressed high resistance state (HRS) and low resistance states (LRS) with bipolar memristive switching mechanism. By varying the pulse amplitude and width, different resistance states have been achieved, indicating the analog switching characteristics of the device. Furthermore, the devices show excellent retention for eleven states over 1000 s with an endurance of > 100 cycles.

Single-trial detection of auditory cues from the rat brain using memristors.

Implantable devices hold the potential to address conditions currently lacking effective treatments, such as drug-resistant neural impairments and prosthetic control. Medical devices need to be biologically compatible while providing enhanced performance metrics of low-power consumption, high accuracy, small size, and minimal latency to enable ongoing intervention in brain function. Here, we demonstrate a memristor-based processing system for single-trial detection of behaviorally meaningful brain signals within a timeframe that supports real-time closed-loop intervention. We record neural activity from the reward center of the brain, the ventral tegmental area, in rats trained to associate a musical tone with a reward, and we use the memristors built-in thresholding properties to detect nontrivial biomarkers in local field potentials. This approach yields consistent and accurate detection of biomarkers >98% while maintaining power consumption as low as 4.14 nanowatt per channel. The efficacy of our system's capabilities to process real-time in vivo neural data paves the way for low-power chronic neural activity monitoring and biomedical implants.

A memristor fingerprinting and characterisation methodology for hardware security.

The modern IC supply chain encompasses a large number of steps and manufacturers. In many applications it is critically important that chips are of the right quality and are assured to have been obtained from the legitimate supply chain. To this end, it is necessary to be able to uniquely identify systems to aid in supply chain tracking and quality assurance. Many identifiers, however, can be cloned onto counterfeit devices and are therefore untrustworthy. This paper proposes a methodology for using post-CMOS memristor devices as a fingerprint to uniquely identify ICs. To achieve this, memristors' unique and variable I-V characteristics are exploited to produce a fingerprint that can be generally applicable to a wide variety of different memristor technologies and identifiable over time, even where cell retention is non-ideal. In doing so it aims to minimise the hardware required on-chip both to minimise cost and maximise the auditability of the system. The methodology is applied to a [Formula: see text] memristor technology, and shown to be able to identify cells in a set.

Interfacing Biology and Electronics with Memristive Materials.

Memristive technologies promise to have a large impact on modern electronics, particularly in the areas of reconfigurable computing and artificial intelligence (AI) hardware. Meanwhile, the evolution of memristive materials alongside the technological progress is opening application perspectives also in the biomedical field, particularly for implantable and lab-on-a-chip devices where advanced sensing technologies generate a large amount of data. Memristive devices are emerging as bioelectronic links merging biosensing with computation, acting as physical processors of analog signals or in the framework of advanced digital computing architectures. Recent developments in the processing of electrical neural signals, as well as on transduction and processing of chemical biomarkers of neural and endocrine functions, are reviewed. It is concluded with a critical perspective on the future applicability of memristive devices as pivotal building blocks in bio-AI fusion concepts and bionic schemes.

Selectively biased tri-terminal vertically-integrated memristor configuration.

Memristors, when utilized as electronic components in circuits, can offer opportunities for the implementation of novel reconfigurable electronics. While they have been used in large arrays, studies in ensembles of devices are comparatively limited. Here we propose a vertically stacked memristor configuration with a shared middle electrode. We study the compound resistive states presented by the combined in-series devices and we alter them either by controlling each device separately, or by altering the full configuration, which depends on selective usage of the middle floating electrode. The shared middle electrode enables a rare look into the combined system, which is not normally available in vertically stacked devices. In the course of this study, it was found that separate switching of individual devices carries over its effects to the Complete device (albeit non-linearly), enabling increased resistive state range, which leads to a larger number of distinguishable states (above SNR variance limits) and hence enhanced device memory. Additionally, by applying a switching stimulus to the external electrodes it is possible to switch both devices simultaneously, making the entire configuration a voltage divider with individual memristive components. Through usage of this type of configuration and by taking advantage of the voltage division, it is possible to surge-protect fragile devices, while it was also found that simultaneous reset of stacked devices is possible, significantly reducing the required reset time in larger arrays.

Palimpsest memories stored in memristive synapses.

Biological synapses store multiple memories on top of each other in a palimpsest fashion and at different time scales. Palimpsest consolidation is facilitated by the interaction of hidden biochemical processes governing synaptic efficacy during varying lifetimes. This arrangement allows idle memories to be temporarily overwritten without being forgotten, while previously unseen memories are used in the short term. While embedded artificial intelligence can greatly benefit from this functionality, a practical demonstration in hardware is missing. Here, we show how the intrinsic properties of metal-oxide volatile memristors emulate the processes supporting biological palimpsest consolidation. Our memristive synapses exhibit an expanded doubled capacity and protect a consolidated memory while up to hundreds of uncorrelated short-term memories temporarily overwrite it, without requiring specialized instructions. We further demonstrate this technology in the context of visual working memory. This showcases how emerging memory technologies can efficiently expand the capabilities of artificial intelligence hardware toward more generalized learning memories.

An FPGA-based system for generalised electron devices testing.

Electronic systems are becoming more and more ubiquitous as our world digitises. Simultaneously, even basic components are experiencing a wave of improvements with new transistors, memristors, voltage/current references, data converters, etc, being designed every year by hundreds of R &D groups world-wide. To date, the workhorse for testing all these designs has been a suite of lab instruments including oscilloscopes and signal generators, to mention the most popular. However, as components become more complex and pin numbers soar, the need for more parallel and versatile testing tools also becomes more pressing. In this work, we describe and benchmark an FPGA system developed that addresses this need. This general purpose testing system features a 64-channel source-meter unit, and [Formula: see text] banks of 32 digital pins for digital I/O. We demonstrate that this bench-top system can obtain [Formula: see text] current noise floor, [Formula: see text] pulse delivery at [Formula: see text] and [Formula: see text] maximum current drive/channel. We then showcase the instrument's use in performing a selection of three characteristic measurement tasks: (a) current-voltage characterisation of a diode and a transistor, (b) fully parallel read-out of a memristor crossbar array and (c) an integral non-linearity test on a DAC. This work introduces a down-scaled electronics laboratory packaged in a single instrument which provides a shift towards more affordable, reliable, compact and multi-functional instrumentation for emerging electronic technologies.

Technology agnostic frequency characterization methodology for memristors.

Over the past decade, memristors have been extensively studied for a number of applications, almost exclusively with DC characterization techniques. Studies of memristors in AC circuits are sparse, with only a few examples found in the literature, and characterization methods with an AC input are also sparingly used. However, publications concerning the usage of memristors in this working regime are currently on the rise. Here we propose a "technology agnostic" methodology for memristor testing in certain frequency bands. A measurement process is initially proposed, with specific instructions on sample preparation, followed by an equipment calibration and measurement protocol. This article is structured in a way which aims to facilitate the usage of any available measurement equipment and it can be applied on any type of memristive technology. The second half of this work is centered around the representation of data received from following this process. Bode plot and Nyquist plot representations are considered and the information received from them is evaluated. Finally, examples of expected behaviors are given, characterizing simulated scenarios which represent different internal device models and different switching behaviors, such as capacitive or inductive switching. This study aims at providing a cohesive way for memristor characterization, to be used as a good starting point for frequency applications, and for understanding physical processes inside the devices, by streamlining the measuring process and providing a frame in which data representation and comparison will be facilitated.

Standards for the Characterization of Endurance in Resistive Switching Devices.

Resistive switching (RS) devices are emerging electronic components that could have applications in multiple types of integrated circuits, including electronic memories, true random number generators, radiofrequency switches, neuromorphic vision sensors, and artificial neural networks. The main factor hindering the massive employment of RS devices in commercial circuits is related to variability and reliability issues, which are usually evaluated through switching endurance tests. However, we note that most studies that claimed high endurances >106 cycles were based on resistance versus cycle plots that contain very few data points (in many cases even <20), and which are collected in only one device. We recommend not to use such a characterization method because it is highly inaccurate and unreliable (i.e., it cannot reliably demonstrate that the device effectively switches in every cycle and it ignores cycle-to-cycle and device-to-device variability). This has created a blurry vision of the real performance of RS devices and in many cases has exaggerated their potential. This article proposes and describes a method for the correct characterization of switching endurance in RS devices; this method aims to construct endurance plots showing one data point per cycle and resistive state and combine data from multiple devices. Adopting this recommended method should result in more reliable literature in the field of RS technologies, which should accelerate their integration in commercial products.

UV induced resistive switching in hybrid polymer metal oxide memristors.

There is an increasing interest for alternative ways to program memristive devices to arbitrary resistive levels. Among them, light-controlled programming approach, where optical input is used to improve or to promote the resistive switching, has drawn particular attention. Here, we present a straight-forward method to induce resistive switching to a memristive device, introducing a new version of a metal-oxide memristive architecture coupled with a UV-sensitive hybrid top electrode obtained through direct surface treatment with PEDOT:PSS of an established resistive random access memory platform. UV-illumination ultimately results to resistive switching, without involving any additional stimulation, and a relation between the switching magnitude and the applied wavelength is depicted. Overall, the system and method presented showcase a promising proof-of-concept for granting an exclusively light-triggered resistive switching to memristive devices irrespectively of the structure and materials comprising their main core, and, in perspective can be considered for functional integrations optical-induced sensing.

Monitoring PSA levels as chemical state-variables in metal-oxide memristors.

Medical interventions increasingly rely on biosensors that can provide reliable quantitative information. A longstanding bottleneck in realizing this, is various non-idealities that generate offsets and variable responses across sensors. Current mitigation strategies involve the calibration of sensors, performed in software or via auxiliary compensation circuitry thus constraining real-time operation and integration efforts. Here, we show that bio-functionalized metal-oxide memristors can be utilized for directly transducing biomarker concentration levels to discrete memory states. The introduced chemical state-variable is found to be dependent on the devices' initial resistance, with its response to chemical stimuli being more pronounced for higher resistive states. We leverage this attribute along with memristors' inherent state programmability for calibrating a biosensing array to render a homogeneous response across all cells. Finally, we demonstrate the application of this technology in detecting Prostate Specific Antigen in clinically relevant levels (ng/ml), paving the way towards applications in large multi-panel assays.

An Electrical Characterisation Methodology for Benchmarking Memristive Device Technologies.

The emergence of memristor technologies brings new prospects for modern electronics via enabling novel in-memory computing solutions and energy-efficient and scalable reconfigurable hardware implementations. Several competing memristor technologies have been presented with each bearing distinct performance metrics across multi-bit memory capacity, low-power operation, endurance, retention and stability. Application needs however are constantly driving the push towards higher performance, which necessitates the introduction of a standard benchmarking procedure for fair evaluation across distinct key metrics. Here we present an electrical characterisation methodology that amalgamates several testing protocols in an appropriate sequence adapted for memristors benchmarking needs, in a technology-agnostic manner. Our approach is designed to extract information on all aspects of device behaviour, ranging from deciphering underlying physical mechanisms to assessing different aspects of electrical performance and even generating data-driven device-specific models. Importantly, it relies solely on standard electrical characterisation instrumentation that is accessible in most electronics laboratories and can thus serve as an independent tool for understanding and designing new memristive device technologies.

Challenges hindering memristive neuromorphic hardware from going mainstream.

Memristive devices have elicited intense research in the past decade thanks to their inherent low voltage operation, multi-bit storage and cost-effective manufacturability. Nonetheless, several outstanding performance and manufacturability challenges have prevented the widespread industry adoption of redox-based memristive matrices. Here, we discuss these challenges in terms of key metrics and propose a roadmap towards realizing competitive memristive-based neuromorphic processing systems.

Multibit memory operation of metal-oxide bi-layer memristors.

Emerging nanoionic memristive devices are considered as the memory technology of the future and have been winning a great deal of attention due to their ability to perform fast and at the expense of low-power and -space requirements. Their full potential is envisioned that can be fulfilled through their capacity to store multiple memory states per cell, which however has been constrained so far by issues affecting the long-term stability of independent states. Here, we introduce and evaluate a multitude of metal-oxide bi-layers and demonstrate the benefits from increased memory stability via multibit memory operation. We propose a programming methodology that allows for operating metal-oxide memristive devices as multibit memory elements with highly packed yet clearly discernible memory states. These states were found to correlate with the transport properties of the introduced barrier layers. We are demonstrating memory cells with up to 6.5 bits of information storage as well as excellent retention and power consumption performance. This paves the way for neuromorphic and non-volatile memory applications.

Analog Memristive Synapse in Spiking Networks Implementing Unsupervised Learning.

Emerging brain-inspired architectures call for devices that can emulate the functionality of biological synapses in order to implement new efficient computational schemes able to solve ill-posed problems. Various devices and solutions are still under investigation and, in this respect, a challenge is opened to the researchers in the field. Indeed, the optimal candidate is a device able to reproduce the complete functionality of a synapse, i.e., the typical synaptic process underlying learning in biological systems (activity-dependent synaptic plasticity). This implies a device able to change its resistance (synaptic strength, or weight) upon proper electrical stimuli (synaptic activity) and showing several stable resistive states throughout its dynamic range (analog behavior). Moreover, it should be able to perform spike timing dependent plasticity (STDP), an associative homosynaptic plasticity learning rule based on the delay time between the two firing neurons the synapse is connected to. This rule is a fundamental learning protocol in state-of-art networks, because it allows unsupervised learning. Notwithstanding this fact, STDP-based unsupervised learning has been proposed several times mainly for binary synapses rather than multilevel synapses composed of many binary memristors. This paper proposes an HfO2-based analog memristor as a synaptic element which performs STDP within a small spiking neuromorphic network operating unsupervised learning for character recognition. The trained network is able to recognize five characters even in case incomplete or noisy images are displayed and it is robust to a device-to-device variability of up to ±30%.