Binary phase-shift keying by coupling modulation of microrings.

We propose a coupling-modulated microring in an add-drop configuration for binary phase-shift keying (BPSK), where data is encoded as 0 and π radian phase-shifts on the optical carrier. The device uses the π radian phase-flip across the zero coupling point in a 2 × 2 Mach-Zehnder interferometer coupler to produce the modulation. The coupling-modulated microring combines the drive power reduction of resonant modulators with the digital phase response of Mach-Zehnder BPSK modulators. A proof-of-concept device was demonstrated in silicon-on-insulator, showing differential binary phase-shift keying operation at 5 and 10 Gb/s.

Cascaded Mach-Zehnder wavelength filters in silicon photonics for low loss and flat pass-band WDM (de-)multiplexing.

We present 1-to-8 wavelength (de-)multiplexer devices based on a binary tree of cascaded Mach-Zehnder-like lattice filters, and manufactured using a 90 nm CMOS-integrated silicon photonics technology. We demonstrate that these devices combine a flat pass-band over more than 50% of the channel spacing with low insertion loss of less than 1.6 dB, and have a small device size of approximately 500 × 400 µm. This makes this type of filters well suited for application as WDM (de-)multiplexer in silicon photonics transceivers for optical data communication in large scale computer systems.

Demonstration of electrooptic modulation at 2165nm using a silicon Mach-Zehnder interferometer.

We demonstrate electrooptic modulation at a wavelength of 2165nm, using a free-carrier injection-based silicon Mach-Zehnder modulator. The modulator has a V(π)∙L figure of merit of 0.12V∙mm, and an extinction ratio of -23dB. Optical modulation experiments are performed at bitrates up to 3Gbps. Our results illustrate that optical modulator design methodologies previously developed for telecom-band devices can be successfully applied to produce high-performance devices for a silicon nanophotonic mid-infrared integrated circuit platform.

High-speed receiver based on waveguide germanium photodetector wire-bonded to 90nm SOI CMOS amplifier.

The performance of a receiver based on a CMOS amplifier circuit designed with 90nm ground rules wire-bonded to a waveguide germanium photodetector is characterized at data rates up to 40Gbps. Both chips were fabricated through the IBM Silicon CMOS Integrated Nanophotonics process on specialty photonics-enabled SOI wafers. At the data rate of 28Gbps which is relevant to the new generation of optical interconnects, a sensitivity of -7.3dBm average optical power is demonstrated with 3.4pJ/bit power-efficiency and 0.6UI horizontal eye opening at a bit-error-rate of 10(-12). The receiver operates error-free (bit-error-rate < 10(-12)) up to 40Gbps with optimized power supply settings demonstrating an energy efficiency of 1.4pJ/bit and 4pJ/bit at data rates of 32Gbps and 40Gbps, respectively, with an average optical power of -0.8dBm.