Intracellular gold nanoparticles influence light scattering and facilitate amplified spontaneous emission generation.

Generation of amplified stimulated emission inside mammalian cells has paved the way for a novel bioimaging and cell sensing approach. Single cells carrying gain media (e.g., fluorescent molecules) are placed inside an optical cavity, allowing the production of intracellular laser emission upon sufficient optical pumping. Here, we investigate the possibility to trigger another amplified emission phenomenon (i.e., amplified spontaneous emission or ASE) inside two different cell types, namely macrophage and epithelial cells from different species and tissues, in the presence of a poorly reflecting cavity. Furthermore, the resulting ASE properties can be enhanced by introducing plasmonic nanoparticles. The presence of gold nanoparticles (AuNPs) in rhodamine 6G-labeled A549 epithelial cells results in higher intensity and lowered ASE threshold in comparison to cells without nanoparticles, due to the effect of plasmonic field enhancement. An increase in intracellular concentration of AuNPs in rhodamine 6G-labeled macrophages is, however, responsible for the twofold increase in the ASE threshold and a reduction in the ASE intensity, dominantly due to a suppressed in and out-coupling of light at high nanoparticle concentrations.

Wafer-scale transfer route for top-down III-nitride nanowire LED arrays based on the femtosecond laser lift-off technique.

The integration of gallium nitride (GaN) nanowire light-emitting diodes (nanoLEDs) on flexible substrates offers opportunities for applications beyond rigid solid-state lighting (e.g., for wearable optoelectronics and bendable inorganic displays). Here, we report on a fast physical transfer route based on femtosecond laser lift-off (fs-LLO) to realize wafer-scale top-down GaN nanoLED arrays on unconventional platforms. Combined with photolithography and hybrid etching processes, we successfully transferred GaN blue nanoLEDs from a full two-inch sapphire substrate onto a flexible copper (Cu) foil with a high nanowire density (~107 wires/cm2), transfer yield (~99.5%), and reproducibility. Various nanoanalytical measurements were conducted to evaluate the performance and limitations of the fs-LLO technique as well as to gain insights into physical material properties such as strain relaxation and assess the maturity of the transfer process. This work could enable the easy recycling of native growth substrates and inspire the development of large-scale hybrid GaN nanowire optoelectronic devices by solely employing standard epitaxial LED wafers (i.e., customized LED wafers with additional embedded sacrificial materials and a complicated growth process are not required).

Vertically Aligned n-Type Silicon Nanowire Array as a Free-Standing Anode for Lithium-Ion Batteries.

Due to its high theoretical specific capacity, a silicon anode is one of the candidates for realizing high energy density lithium-ion batteries (LIBs). However, problems related to bulk silicon (e.g., low intrinsic conductivity and massive volume expansion) limit the performance of silicon anodes. In this work, to improve the performance of silicon anodes, a vertically aligned n-type silicon nanowire array (n-SiNW) was fabricated using a well-controlled, top-down nano-machining technique by combining photolithography and inductively coupled plasma reactive ion etching (ICP-RIE) at a cryogenic temperature. The array of nanowires ~1 µm in diameter and with the aspect ratio of ~10 was successfully prepared from commercial n-type silicon wafer. The half-cell LIB with free-standing n-SiNW electrode exhibited an initial Coulombic efficiency of 91.1%, which was higher than the battery with a blank n-silicon wafer electrode (i.e., 67.5%). Upon 100 cycles of stability testing at 0.06 mA cm-2, the battery with the n-SiNW electrode retained 85.9% of its 0.50 mAh cm-2 capacity after the pre-lithiation step, whereas its counterpart, the blank n-silicon wafer electrode, only maintained 61.4% of 0.21 mAh cm-2 capacity. Furthermore, 76.7% capacity retention can be obtained at a current density of 0.2 mA cm-2, showing the potential of n-SiNW anodes for high current density applications. This work presents an alternative method for facile, high precision, and high throughput patterning on a wafer-scale to obtain a high aspect ratio n-SiNW, and its application in LIBs.

Versatilely tuned vertical silicon nanowire arrays by cryogenic reactive ion etching as a lithium-ion battery anode.

Production of high-aspect-ratio silicon (Si) nanowire-based anode for lithium ion batteries is challenging particularly in terms of controlling wire property and geometry to improve the battery performance. This report demonstrates tunable optimization of inductively coupled plasma reactive ion etching (ICP-RIE) at cryogenic temperature to fabricate vertically-aligned silicon nanowire array anodes with high verticality, controllable morphology, and good homogeneity. Three different materials [i.e., photoresist, chromium (Cr), and silicon dioxide (SiO2)] were employed as masks during the subsequent photolithography and cryogenic ICP-RIE processes to investigate their effects on the resulting nanowire structures. Silicon nanowire arrays with a high aspect ratio of up to 22 can be achieved by tuning several etching parameters [i.e., temperature, oxygen/sulfur hexafluoride (O2/SF6) gas mixture ratio, chamber pressure, plasma density, and ion energy]. Higher compressive stress was revealed for longer Si wires by means of Raman spectroscopy. Moreover, an anisotropy of lattice stress was found at the top and sidewall of Si nanowire, indicating compressive and tensile stresses, respectively. From electrochemical characterization, half-cell battery integrating ICP-RIE-based silicon nanowire anode exhibits a capacity of 0.25 mAh cm-2 with 16.67% capacity fading until 20 cycles, which has to be improved for application in future energy storage devices.