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Time of flight is promising technology in machine vision and sensing, with an emerging need for low power consumption, a high image resolution, and reliable operation in high ambient light conditions. Therefore, we propose a novel direct time-of-flight pixel using the single-photon avalanche diode (SPAD) sensor, with an in-pixel averaging method to suppress ambient light and detect the laser pulse arrival time. The system utilizes two orthogonal sinusoidal signals applied to the pixel as inputs, which are synchronized with a pulsed laser source. The detected signal phase indicates the arrival time. To evaluate the proposed system's potential, we developed analytical and statistical models for assessing the phase error and precision of the arrival time under varying ambient light levels. The pixel simulation showed that the phase precision is less than 1% of the detection range when the ambient-to-signal ratio is 120. A proof-of-concept pixel array prototype was fabricated and characterized to validate the system's performance. The pixel consumed, on average, 40 µW of power in operation with ambient light. The results demonstrate that the system can operate effectively under varying ambient light conditions and its potential for customization based on specific application requirements. This paper concludes by discussing the system's performance relative to the existing direct time-of-flight technologies, identifying their strengths and limitations.
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Single-photon detection and timing has attracted increasing interest in recent years due to their necessity in the field of quantum sensing and the advantages of single-quanta detection in the field of low-level light imaging. While simple bucket detectors are mature enough for commercial applications, more complex imaging detectors are still a field of research comprising mostly prototype-level detectors. A major problem in these detectors is the implementation of in-pixel timing circuitry, especially for two-dimensional imagers. One of the most promising approaches is the use of voltage-controlled ring resonators in every pixel. Each of these runs independently based on a voltage supplied by a global reference. However, this yields the problem that the supply voltage can change across the chip which, in turn, changes the period of the ring resonator. Due to additional parasitic effects, this problem can worsen with increasing measurement time, leading to drift in the timing information. We present here a method to identify and correct such temporal drifts in single-photon detectors based on asynchronous quantum ghost imaging. We also show the effect of this correction on recent quantum ghost imaging (QGI) measurement from our group.
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Single-photon avalanche diodes (SPADs) are novel image sensors that record photons at extremely high sensitivity. To reduce both the required sensor area for readout circuits and the data throughput for SPAD array, in this paper, we propose a snapshot compressive sensing single-photon avalanche diode (CS-SPAD) sensor which can realize on-chip snapshot-type spatial compressive imaging in a compact form. Taking advantage of the digital counting nature of SPAD sensing, we propose to design the circuit connection between the sensing unit and the readout electronics for compressive sensing. To process the compressively sensed data, we propose a convolution neural-network-based algorithm dubbed CSSPAD-Net which could realize both high-fidelity scene reconstruction and classification. To demonstrate our method, we design and fabricate a CS-SPAD sensor chip, build a prototype imaging system, and demonstrate the proposed on-chip snapshot compressive sensing method on the MINIST dataset and real handwritten digital images, with both qualitative and quantitative results.
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A gating circuit for a photonic quantum simulator is introduced. The gating circuit uses a large excess bias voltage of up to 9.9 V and an integrated single-photon avalanche diode (SPAD). Nine channels are monolithically implemented in an application-specific integrated circuit (ASIC) including nine SPADs using 0.18 µm high-voltage CMOS technology. The gating circuit achieves rise and fall times of 480 ps and 280 ps, respectively, and a minimum full-width-at-half-maximum pulse width of 1.26 ns. Thanks to a fast and sensitive comparator, a detection threshold for avalanche events of less than 100 mV is possible. The power consumption of all nine channels is about 250 mW in total. This gating chip is used to characterize the integrated SPADs. A photon detection probability of around 50% at 9.9 V excess bias and for a wavelength of 635 nm is found.
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Image sensors such as single-photon avalanched diode (SPAD) arrays typically adopt in-pixel quenching and readout circuits, and the under-illumination first-stage readout circuits often employs high-threshold input/output (I/O) or thick-oxide metal-oxide-semiconductor field-effect transistors (MOSFETs). We have observed reliability issues with high-threshold n-channel MOSFETs when they are exposed to strong visible light. The specific stress conditions have been applied to observe the drain current (Id) variations as a function of gate voltage. The experimental results indicate that photo-induced hot electrons generate interface trap states, leading to Id degradation including increased off-state current (Ioff) and decreased on-state current (Ion). The increased Ioff further activates parasitic bipolar junction transistors (BJT). This reliability issue can be avoided by forming an inversion layer in the channel under appropriate bias conditions or by reducing the incident photon energy.
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The purpose of this work is to prove the suitability of integrated single-photon avalanche diode (SPAD)-based indirect time-of-flight (iTOF) for sub-100 µm precision depth sensing using a correlation approach with GHz modulation frequencies. For this purpose, a prototype containing a single pixel consisting of an integrated SPAD, quenching circuit, and two independent correlator circuits was fabricated in a 0.35 µm CMOS process and characterized. It achieved a precision of 70 µm and a nonlinearity of less than 200 µm at a received signal power of less than 100 pW. Sub-mm precision was achieved with a signal power of less than 200 fW. These results and the simplicity of our correlation approach underline the great potential of SPAD-based iTOF for future depth sensing applications.
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The performance of an active-quenching single-photon avalanche diode (SPAD) array that is based on the tri-state gates of a field programmable gate array (FPGA) is presented. The array is implemented by stacking a bare 4 × 4 N-on-P SPAD array on a bare FPGA die, and the electrodes of the SPAD pixels and the I/O ports of the FPGA are connected through wire bonding within the same package. The active quenching action on each SPAD pixel is performed by using the properties of the tri-state gates of the FPGA. Digital signal processing, such as pulse counters, data encoders, and command interactions, is also performed by using the same FPGA. The breakdown voltage of the SPAD pixels, with an active area of 60 µm × 60 µm, is 47.2-48.0 V. When the device is reverse biased at a voltage of ~50.4 V, a response delay of ~50 ns, a dead time of 157 ns, a dark count rate of 2.44 kHz, and an afterpulsing probability of 6.9% are obtained. Its peak photon detection probability (PDP) reaches 17.0% at a peak wavelength of 760 nm and remains above 10% at 900 nm. This hybrid integrated SPAD array is reconfigurable and cost effective.
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Visible light communication (VLC) is an emerging mode of wireless communication that supports both illumination and communication. One essential function of VLC systems is the dimming control, which requires a sensitive receiver for low-light conditions. The use of an array of single-photon avalanche diodes (SPADs) is one promising approach to enhancing receivers' sensitivity in a VLC system. However, because of the non-linear effects brought on by the SPAD dead time, an increase in the brightness of the light might degrade its performance. In this paper, an adaptive SPAD receiver is proposed for VLC systems to ensure reliable operation under various dimming levels. In the proposed receiver, a variable optical attenuator (VOA) is used to adaptively control the SPAD's incident photon rate according to the instantaneous received optical power so that SPAD operates in its optimal conditions. The application of the proposed receiver in systems with various modulation schemes is investigated. When binary on-off keying (OOK) modulation is employed due to its good power efficiency, two dimming control methods of the IEEE 802.15.7 standard based on analogue and digital dimming are considered. We also investigate the application of the proposed receiver in the spectral efficient VLC systems with multi-carrier modulation schemes, i.e., direct current (DCO) and asymmetrically clipped optical (ACO) orthogonal frequency division multiplexing (OFDM). Through extensive numerical results, it is demonstrated that the suggested adaptive receiver outperforms the conventional PIN PD and SPAD array receivers in terms of bit error rate (BER) and achievable data rate.
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We present an integrated single-photon detection device custom designed for quantum key distribution (QKD) with time-bin encoded single photons. We implemented and demonstrated a prototype photon-to-digital converter (PDC) that integrates an 8 × 8 single-photon avalanche diode (SPAD) array with on-chip digital signal processing built in TSMC 65 nm CMOS. The prototype SPADs are used to validate the QKD functionalities with an array of time-to-digital converters (TDCs) to timestamp and process the photon detection events. The PDC uses window gating to reject noise counts and on-chip processing to sort the photon detections into respective time-bins. The PDC prototype achieved a 22.7 ps RMS timing resolution and demonstrated operation in a time-bin setup with 158 ps time-bins at an optical wavelength of 410 nm. This PDC can therefore be an important building block for a QKD receiver and enables compact and robust time-bin QKD systems with imaging detectors.
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We present the first reported use of a CMOS-compatible single photon avalanche diode (SPAD) array for the detection of high-energy charged particles, specifically pions, using the Super Proton Synchrotron at CERN, the European Organization for Nuclear Research. The results confirm the detection of incident high-energy pions at 120 GeV, minimally ionizing, which complements the variety of ionizing radiation that can be detected with CMOS SPADs.
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The radiation hardness of 180 nm complementary metal-oxide-semiconductor (CMOS) and 55 nm bipolar-CMOS-double-diffused MOS single-photon avalanche diodes (SPADs) is studied using 10 MeV and 100 MeV protons up to a displacement damage dose of 1 PeV/g. It is found that the dark count rate (DCR) levels are dependent on the number and the type of defects created. A new stepwise increase in the DCR is presented. Afterpulsing was found to be a significant contributor to the observed DCR increase. A new model for DCR increase prediction is proposed considering afterpulsing. Most of the samples under test retain reasonable DCR levels after irradiation, showing high tolerance to ionizing and displacement damage caused by protons. Following irradiation, self-healing was observed at room temperature. Furthermore, high-temperature annealing shows potential for accelerating recovery. Overall, the results show the suitability of SPADs as optical detectors for long-term space missions or as detectors for high-energy particles.
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The growing demands on compact and high-definition single-photon avalanche diode (SPAD) arrays have motivated researchers to explore pixel miniaturization techniques to achieve sub-10 µm pixels. The scaling of the SPAD pixel size has an impact on key performance metrics, and it is, thereby, critical to conduct a systematic analysis of the underlying tradeoffs in miniaturized SPADs. On the basis of the general assumptions and constraints for layout geometry, we performed an analytical formulation of the scaling laws for the key metrics, such as the fill factor (FF), photon detection probability (PDP), dark count rate (DCR), correlated noise, and power consumption. Numerical calculations for various parameter sets indicated that some of the metrics, such as the DCR and power consumption, were improved by pixel miniaturization, whereas other metrics, such as the FF and PDP, were degraded. Comparison of the theoretically estimated scaling trends with previously published experimental results suggests that the scaling law analysis is in good agreement with practical SPAD devices. Our scaling law analysis could provide a useful tool to conduct a detailed performance comparison between various process, device, and layout configurations, which is essential for pushing the limit of SPAD pixel miniaturization toward sub-2 µm-pitch SPADs.
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Being ready-to-detect over a certain portion of time makes the time-gated single-photon avalanche diode (SPAD) an attractive candidate for low-noise photon-counting applications. A careful SPAD noise and performance characterization, however, is critical to avoid time-consuming experimental optimization and redesign iterations for such applications. Here, we present an extensive empirical study of the breakdown voltage, as well as the dark-count and afterpulsing noise mechanisms for a fully integrated time-gated SPAD detector in 0.35-µm CMOS based on experimental data acquired in a dark condition. An "effective" SPAD breakdown voltage is introduced to enable efficient characterization and modeling of the dark-count and afterpulsing probabilities with respect to the excess bias voltage and the gating duration time. The presented breakdown and noise models will allow for accurate modeling and optimization of SPAD-based detector designs, where the SPAD noise can impose severe trade-offs with speed and sensitivity as is shown via an example.
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Avalanche , Fótons , ProbabilidadeRESUMO
Silicon photomultipliers (SiPMs) are arrays of single-photon avalanche diodes (SPADs) connected in parallel. Analog silicon photomultipliers are built in custom technologies optimized for detection efficiency. Digital silicon photomultipliers are built in CMOS technology. Although CMOS SPADs are less sensitive, they can incorporate additional functionality at the sensor plane, which is required in some applications for an accurate detection in terms of energy, timestamp, and spatial location. This additional circuitry comprises active quenching and recharge circuits, pulse combining and counting logic, and a time-to-digital converter. This, together with the disconnection of defective SPADs, results in a reduction of the light-sensitive area. In addition, the pile-up of pulses, in space and in time, translates into additional efficiency losses that are inherent to digital SiPMs. The design of digital SiPMs must include some sort of optimization of the pixel architecture in order to maximize sensitivity. In this paper, we identify the most relevant variables that determine the influence of SPAD yield, fill factor loss, and spatial and temporal pile-up in the photon detection efficiency. An optimum of 8% is found for different pixel sizes. The potential benefits of molecular imaging of these optimized and small-sized pixels with independent timestamping capabilities are also analyzed.
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Diagnóstico por Imagem , Fótons , RadiografiaRESUMO
Analog and digital SiPMs have revolutionized the field of radiation instrumentation by replacing both avalanche photodiodes and photomultiplier tubes in many applications. However, multiple applications require greater performance than the current SiPMs are capable of, for example timing resolution for time-of-flight positron emission tomography and time-of-flight computed tomography, and mitigation of the large output capacitance of SiPM array for large-scale time projection chambers for liquid argon and liquid xenon experiments. In this contribution, the case will be made that 3D photon-to-digital converters, also known as 3D digital SiPMs, have a potentially superior performance over analog and 2D digital SiPMs. A review of 3D photon-to-digital converters is presented along with various applications where they can make a difference, such as time-of-flight medical imaging systems and low-background experiments in noble liquids. Finally, a review of the key design choices that must be made to obtain an optimized 3D photon-to-digital converter for radiation instrumentation, more specifically the single-photon avalanche diode array, the CMOS technology, the quenching circuit, the time-to-digital converter, the digital signal processing and the system level integration, are discussed in detail.
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In this paper, we present a proposed field programmable gate array (FPGA)-based time-to-digital converter (TDC) architecture to achieve high performance with low usage of resources. This TDC can be employed for multi-channel direct Time-of-Flight (ToF) applications. The proposed architecture consists of a synchronizing input stage, a tuned tapped delay line (TDL), a combinatory encoder of ones and zeros counters, and an online calibration stage. The experimental results of the TDC in an Artix-7 FPGA show a differential non-linearity (DNL) in the range of [-0.953, 1.185] LSB, and an integral non-linearity (INL) within [-2.750, 1.238] LSB. The measured LSB size and precision are 22.2 ps and 26.04 ps, respectively. Moreover, the proposed architecture requires low FPGA resources.
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An ultrafast Active Quenching-Active Reset (AQAR) circuit is presented for the afterpulsing reduction in a Single Photon Avalanche Diode (SPAD). The proposed circuit is designed in a 28 nm Fully Depleted Silicon On Insulator (FD-SOI) CMOS technology. By exploiting the body biasing technique, the avalanche is detected very quickly and, consequently, is quenched very fast. The fast quenching decreases the avalanche charges, therefore resulting in the afterpulsing reduction. Both post-layout and experimental results are presented and are highly in accordance with each other. It is shown that the proposed AQAR circuit is able to detect the avalanche in less than 40 ps and reduce the avalanche charge and the afterpulsing up to 50%.
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Avalanche , Silício , Fótons , Semicondutores , TecnologiaRESUMO
Time-of-Flight (TOF) based Light Detection and Ranging (LiDAR) is a widespread technique for distance measurements in both single-spot depth ranging and 3D mapping. Single Photon Avalanche Diode (SPAD) detectors provide single-photon sensitivity and allow in-pixel integration of a Time-to-Digital Converter (TDC) to measure the TOF of single-photons. From the repetitive acquisition of photons returning from multiple laser shots, it is possible to accumulate a TOF histogram, so as to identify the laser pulse return from unwelcome ambient light and compute the desired distance information. In order to properly predict the TOF histogram distribution and design each component of the LiDAR system, from SPAD to TDC and histogram processing, we present a detailed statistical modelling of the acquisition chain and we show the perfect matching with Monte Carlo simulations in very different operating conditions and very high background levels. We take into consideration SPAD non-idealities such as hold-off time, afterpulsing, and crosstalk, and we show the heavy pile-up distortion in case of high background. Moreover, we also model non-idealities of timing electronics chain, namely, TDC dead-time, limited number of storage cells for TOF data, and TDC sharing. Eventually, we show how the exploit the modelling to reversely extract the original LiDAR return signal from the distorted measured TOF data in different operating conditions.
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Modelos Estatísticos , Fótons , Eletrônica , Luz , Método de Monte CarloRESUMO
Single-Photon Avalanche Diodes (SPAD) in Complementary Metal-Oxide Semiconductor (CMOS) technology are potential candidates for future "Light Detection and Ranging" (Lidar) space systems. Among the SPAD performance parameters, the Photon Detection Probability (PDP) is one of the principal parameters. Indeed, this parameter is used to evaluate the SPAD sensitivity, which directly affects the laser power or the telescope diameter of space-borne Lidars. In this work, we developed a model and a simulation method to predict accurately the PDP of CMOS SPAD, based on a combination of measurements to acquire the CMOS process doping profile, Technology Computer-Aided Design (TCAD) simulations, and a Matlab routine. We compare our simulation results with a SPAD designed and processed in CMOS 180 nm technology. Our results show good agreement between PDP predictions and measurements, with a mean error around 18.5%, for wavelength between 450 and 950 nm and for a typical range of excess voltages between 15 and 30% of the breakdown voltage. Due to our SPAD architecture, the high field region is not entirely insulated from the substrate, a comparison between simulations performed with and without the substrate contribution indicates that PDP can be simulated without this latter with a moderate loss of precision, around 4.5 percentage points.
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Light Detection and Ranging (LiDAR) is a 3D imaging technique, widely used in many applications such as augmented reality, automotive, machine vision, spacecraft navigation and landing. Achieving long-ranges and high-speed, most of all in outdoor applications with strong solar background illumination, are challenging requirements. In the introduction we review different 3D-ranging techniques (stereo-vision, projection with structured light, pulsed-LiDAR, amplitude-modulated continuous-wave LiDAR, frequency-modulated continuous-wave interferometry), illumination schemes (single point and blade scanning, flash-LiDAR) and time-resolved detectors for LiDAR (EM-CCD, I-CCD, APD, SPAD, SiPM). Then, we provide an extensive review of silicon- single photon avalanche diode (SPAD)-based LiDAR detectors (both commercial products and research prototypes) analyzing how each architecture faces the main challenges of LiDAR (i.e., long ranges, centimeter resolution, large field-of-view and high angular resolution, high operation speed, background immunity, eye-safety and multi-camera operation). Recent progresses in 3D stacking technologies provided an important step forward in SPAD array development, allowing to reach smaller pitch, higher pixel count and more complex processing electronics. In the conclusions, we provide some guidelines for the design of next generation SPAD-LiDAR detectors.