Ambipolar charge-transfer graphene plasmonic cavities.

Plasmon polaritons in van der Waals materials hold promise for various photonics applications1-4. The deterministic imprinting of spatial patterns of high carrier density in plasmonic cavities and nanoscale circuitry can enable the realization of advanced nonlinear nanophotonic5 and strong light-matter interaction platforms6. Here we demonstrate an oxidation-activated charge transfer strategy to program ambipolar low-loss graphene plasmonic structures. By covering graphene with transition-metal dichalcogenides and subsequently oxidizing the transition-metal dichalcogenides into transition-metal oxides, we activate charge transfer rooted in the dissimilar work functions between transition-metal oxides and graphene. Nano-infrared imaging reveals ambipolar low-loss plasmon polaritons at the transition-metal-oxide/graphene interfaces. Further, by inserting dielectric van der Waals spacers, we can precisely control the electron and hole densities induced by oxidation-activated charge transfer and achieve plasmons with a near-intrinsic quality factor. Using this strategy, we imprint plasmonic cavities with laterally abrupt doping profiles with nanoscale precision and demonstrate plasmonic whispering-gallery resonators based on suspended graphene encapsulated in transition-metal oxides.

Absence of a Band Gap at the Interface of a Metal and Highly Doped Monolayer MoS2.

High quality electrical contact to semiconducting transition metal dichalcogenides (TMDCs) such as MoS2 is key to unlocking their unique electronic and optoelectronic properties for fundamental research and device applications. Despite extensive experimental and theoretical efforts reliable ohmic contact to doped TMDCs remains elusive and would benefit from a better understanding of the underlying physics of the metal-TMDC interface. Here we present measurements of the atomic-scale energy band diagram of junctions between various metals and heavily doped monolayer MoS2 using ultrahigh vacuum scanning tunneling microscopy (UHV-STM). Our measurements reveal that the electronic properties of these junctions are dominated by two-dimensional metal-induced gap states (MIGS). These MIGS are characterized by a spatially growing measured gap in the local density of states (L-DOS) of the MoS2 within 2 nm of the metal-semiconductor interface. Their decay lengths extend from a minimum of ∼0.55 nm near midgap to as long as 2 nm near the band edges and are nearly identical for Au, Pd, and graphite contacts, indicating that it is a universal property of the monolayer semiconductor. Our findings indicate that even in heavily doped semiconductors, the presence of MIGS sets the ultimate limit for electrical contact.

Damage-Free Atomic Layer Etch of WSe2: A Platform for Fabricating Clean Two-Dimensional Devices.

The development of a controllable, selective, and repeatable etch process is crucial for controlling the layer thickness and patterning of two-dimensional (2D) materials. However, the atomically thin dimensions and high structural similarity of different 2D materials make it difficult to adapt conventional thin-film etch processes. In this work, we propose a selective, damage-free atomic layer etch (ALE) that enables layer-by-layer removal of monolayer WSe2 without altering the physical, optical, and electronic properties of the underlying layers. The etch uses a top-down approach where the topmost layer is oxidized in a self-limited manner and then removed using a selective etch. Using a comprehensive set of material, optical, and electrical characterization, we show that the quality of our ALE processed layers is comparable to that of pristine layers of similar thickness. The ALE processed WSe2 layers preserve their bright photoluminescence characteristics and possess high room-temperature hole mobilities of 515 cm2/V·s, essential for fabricating high-performance 2D devices. Further, using graphene as a testbed, we demonstrate the fabrication of ultra-clean 2D devices using a sacrificial monolayer WSe2 layer to protect the channel during processing, which is etched in the final process step in a technique we call sacrificial WSe2 with ALE processing (SWAP). The graphene transistors made using the SWAP technique demonstrate high room-temperature field-effect mobilities, up to 200,000 cm2/V·s, better than previously reported unencapsulated graphene devices.

Interfacial n-Doping Using an Ultrathin TiO2 Layer for Contact Resistance Reduction in MoS2.

We demonstrate a low and constant effective Schottky barrier height (ΦB ∼ 40 meV) irrespective of the metal work function by introducing an ultrathin TiO2 ALD interfacial layer between various metals (Ti, Ni, Au, and Pd) and MoS2. Transmission line method devices with and without the contact TiO2 interfacial layer on the same MoS2 flake demonstrate reduced (24×) contact resistance (RC) in the presence of TiO2. The insertion of TiO2 at the source-drain contact interface results in significant improvement in the on-current and field effect mobility (up to 10×). The reduction in RC and ΦB has been explained through interfacial doping of MoS2 and validated by first-principles calculations, which indicate metallic behavior of the TiO2-MoS2 interface. Consistent with DFT results of interfacial doping, X-ray photoelectron spectroscopy (XPS) data also exhibit a 0.5 eV shift toward higher binding energies for Mo 3d and S 2p peaks in the presence of TiO2, indicating Fermi level movement toward the conduction band (n-type doping). Ultraviolet photoelectron spectroscopy (UPS) further corroborates the interfacial doping model, as MoS2 flakes capped with ultrathin TiO2 exhibit a reduction of 0.3 eV in the effective work function. Finally, a systematic comparison of the impact of selective doping with the TiO2 layer under the source-drain metal relative to that on top of the MoS2 channel shows a larger benefit for transistor performance from the reduction in source-drain contact resistance.

Few-Layer MoS2 p-Type Devices Enabled by Selective Doping Using Low Energy Phosphorus Implantation.

P-type doping of MoS2 has proved to be a significant bottleneck in the realization of fundamental devices such as p-n junction diodes and p-type transistors due to its intrinsic n-type behavior. We report a CMOS compatible, controllable and area selective phosphorus plasma immersion ion implantation (PIII) process for p-type doping of MoS2. Physical characterization using SIMS, AFM, XRD and Raman techniques was used to identify process conditions with reduced lattice defects as well as low surface damage and etching, 4X lower than previous plasma based doping reports for MoS2. A wide range of nondegenerate to degenerate p-type doping is demonstrated in MoS2 field effect transistors exhibiting dominant hole transport. Nearly ideal and air stable, lateral homogeneous p-n junction diodes with a gate-tunable rectification ratio as high as 2 × 10(4) are demonstrated using area selective doping. Comparison of XPS data from unimplanted and implanted MoS2 layers shows a shift of 0.67 eV toward lower binding energies for Mo and S peaks indicating p-type doping. First-principles calculations using density functional theory techniques confirm p-type doping due to charge transfer originating from substitutional as well as physisorbed phosphorus in top few layers of MoS2. Pre-existing sulfur vacancies are shown to enhance the doping level significantly.