RESUMO
Polaronic configurations that were introduced by oxygen vacancy in rutile TiO2 crystal have been studied by the DFT + U method. It is found that the building block of TiO6 will expand when extra electron is trapped in the central Ti atom as polaron. With manually adjusting the initial geometry of oxygen vacancy structure, a variety of polaronic configurations are obtained after variable-cell relaxation. By calculating different sizes of supercell model, it is found that the most stable configuration can be influenced by the density of oxygen vacancy. With increasing interaction between vacancies, the most stable polaronic configuration change from small polaronic configuration to mixed configuration.
RESUMO
Resistive switching (RS) phenomena have been vigorously investigated in a large variety of materials and highlighted for its preeminent potential for the future nonvolatile semiconductor memory applications or reconfigurable logic circuits. Among the various resistive switching materials, the binary metal oxides demonstrate more advantageous for micro- or nano-electronics applications due to their simpler fabrication process and compatibility with conventional CMOS technology, though the mechanisms are controversial due to the diversity of RS effects. This review mainly focuses on the current understanding of the microscopic nature of RS in titanium oxides, in which the working mechanisms can be categorized into thermochemical metallization mechanism, valence change mechanism, and electrostatic/electronic mechanism. The approaches developed to investigate the RS and the specific switching processes related to different mechanisms are addressed. Since titanium oxides are oxygen-vacancy doped semiconductors, the role of defects is analyzed in detail and possible effective strategies to improve the performance of RS are addressed.
Assuntos
Nanopartículas Metálicas/química , Nanopartículas Metálicas/ultraestrutura , Nanotecnologia/instrumentação , Semicondutores , Processamento de Sinais Assistido por Computador/instrumentação , Titânio/química , Cristalização/métodos , Impedância Elétrica , Desenho de Equipamento , Tamanho da PartículaRESUMO
Plasma-enhanced chemical vapor deposition (PECVD) is widely used for the synthesis of carbon materials, such as diamond-like carbons (DLCs), carbon nanotubes (CNTs) and carbon nanowalls (CNWs). Advantages of PECVD are low synthesis temperature compared with thermal CVD and the ability to grow vertically, free-standing structures. Due to its self-supported property and high specific surface area, CNWs are a promising material for field emission devices and other chemical applications. This article reviews the recent process on the synthesis of CNW by the PECVD method. We briefly introduce the structure and properties of CNW with characterization techniques. Growth mechanism is also discussed to analyze the influence of plasma conditions, substrates, temperature, and other parameters to the final film, which will give a suggestion on parameter modulation for desired film.
Assuntos
Cristalização/métodos , Nanotubos de Carbono/química , Nanotubos de Carbono/ultraestrutura , Gases em Plasma/química , Teste de Materiais , Conformação Molecular , Tamanho da Partícula , Propriedades de SuperfícieRESUMO
Multi-island single electron transistor is an important kind of the single electron transistor, which is convenient to realize the controllable room temperature operation. A novel semi-empirical compact model for the Multi-island single electron transistor is proposed. The new approach combines the orthodox theory of the single electron tunneling through single coulomb island and a novel empirical analysis procedure for the chain of multi coulomb islands to solve the current of the whole multi-island single electron transistor. The tunneling rates are calculated based on the orthodox theory for the single electron tunneling. The tunneling currents representing the first splitted peaks in the coulomb oscillation curves are calculated according to the assumption that the currents through all the coulomb islands are equal to each other at the stable states, while the currents representing the other splitted peaks are constructed and merged together according to the empirical analysis. The model is verified by the traditional SET simulator SIMON and shows much faster calculation speed than SIMON. Therefore, the novel compact model is suitable for the large scale MISET circuit simulation.
RESUMO
The titania showing reversible resistive switching are attractive for today's semiconductor technology in nonvolatile random-access memories. A novel fabrication method for titania resistive switching device with vertical structure is proposed. First, the Pt electrode was fabricated the bottom using conventional photolithography and chemical etching technique. Next, the titania thin films with the thickness about 50 nm was deposited on the bottom electrode by electron beam evaporation (EBE). Then, the trench of photoresist for electrode deposit was etched with mild chemical process to preserve the original structure of titania layer. After that, the platinum was deposited in the trench of photoresist using ion sputter. A final lift-off process to define the Pt top electrodes was performed with acetone in an ultrasonic bath to remove the resist. The resistive bistability was observed in this device. The on-threshold voltage is +1.5 V and the off-threshold voltage is -0.6 V. The resistance ratio between the two stable states of the device including Al electrode is approximately 1 x 10(3), the state is nonvolatile and the retention-time test performed over an hour in sweeping mode measurement. The results indicate the forming and rupture of conductive channel relate to the defects and distributing of oxygen vacancy. This method is low-cost, high-yielding, and easy to implement, which is applicable to the fabrication of nonvolatile memories.
RESUMO
Single electron transistor (SET) has become a promising candidate for the key device of logic circuit in the near future. The advances of recent 5 years in the modeling of SETs are reviewed for the simulation of SET/hybrid CMOS-SET integrated circuit. Three dominating SET models, Monte Carlo model, master equation model and macro model, are analyzed, tested and compared on their principles, characteristics, applicability and development trend. The Monte Carlo model is suitable for SET structure research and simulation of small scale SET circuit, while the analytical model based on combination with master equation and macro model is suitable to simulate the SET circuit at balanceable efficiency and accuracy.