Anisotropic electrical resistance in mesoscopic LaAlO3/SrTiO3 devices with individual domain walls.

The crystal structure of bulk SrTiO3(STO) transitions from cubic to tetragonal at around 105 K. Recent local scanning probe measurements of LaAlO3/SrTiO3 (LAO/STO) interfaces indicated the existence of spatially inhomogeneous electrical current paths and electrostatic potential associated with the structural domain formation in the tetragonal phase of STO. Here we report a study of temperature dependent electronic transport in combination with the polarized light microscopy of structural domains in mesoscopic LAO/STO devices. By reducing the size of the conductive interface to be comparable to that of a single tetragonal domain of STO, the anisotropy of interfacial electron conduction in relationship to the domain wall and its direction was characterized between T = 10-300 K. It was found that the four-point resistance measured with current parallel to the domain wall is larger than the resistance measured perpendicular to the domain wall. This observation is qualitatively consistent with the current diverting effect from a more conductive domain wall within the sample. Among all the samples studied, the maximum resistance ratio found is at least 10 and could be as large as 105 at T = 10 K. This electronic anisotropy may have implications on other oxide hetero-interfaces and the further understanding of electronic/magnetic phenomena found in LAO/STO.

Intrinsic Electron Mobility Exceeding 10³ cm²/(V s) in Multilayer InSe FETs.

Graphene-like two-dimensional (2D) materials not only are interesting for their exotic electronic structure and fundamental electronic transport or optical properties but also hold promises for device miniaturization down to atomic thickness. As one material belonging to this category, InSe, a III-VI semiconductor, not only is a promising candidate for optoelectronic devices but also has potential for ultrathin field effect transistor (FET) with high mobility transport. In this work, various substrates such as PMMA, bare silicon oxide, passivated silicon oxide, and silicon nitride were used to fabricate multilayer InSe FET devices. Through back gating and Hall measurement in four-probe configuration, the device's field effect mobility and intrinsic Hall mobility were extracted at various temperatures to study the material's intrinsic transport behavior and the effect of dielectric substrate. The sample's field effect and Hall mobilities over the range of 20-300 K fall in the range of 0.1-2.0 × 10(3) cm(2)/(V s), which are comparable or better than the state of the art FETs made of widely studied 2D transition metal dichalcogenides.