Mobility and current boosting of In-Ga-Zn-O thin-film transistors with metal capping layer oxidation.

This study investigates the effect of an oxidized Ta capping layer on the boosting of field-effect mobility (µFE) of amorphous In-Ga-Zn-O (a-IGZO) Thin-film transistors (TFTs). The oxidation of Ta creates additional oxygen vacancies on the a-IGZO channel surface, leading to increased carrier density. We investigate the effect of increasing Ta coverage on threshold voltage (Vth), on-state current,µFEand gate bias stress stability of a-IGZO TFTs. A significant increase inµFEof over 8 fold, from 16 cm2Vs-1to 140 cm2Vs-1, was demonstrated with the Ta capping layer covering 90% of the channel surface. By partial leaving the a-IGZO uncovered at the contact region, a potential barrier region was created, maintaining the low off-state current and keeping the threshold voltage near 0 V, while the capped region operated as a carrier-boosted region, enhancing channel conduction. The results reported in this study present a novel methodology for realizing high-performance oxide semiconductor devices. The demonstrated approach holds promise for a wide range of next-generation device applications, offering new avenues for advancement in metal oxide semiconductor TFTs.

Improved high voltage operation of amorphous In-Ga-Zn-O thin film transistor by carrier density enhancement.

We report on improved high voltage operation of amorphous-In-Ga-Zn-O (a-IGZO) thin film transistors (TFTs) by increasing carrier density and distributing the high bias field over the length of the device which utilizes an off-set drain structure. By decreasing the O2partial pressure during sputter deposition of IGZO, the channel carrier density of the high voltage a-IGZO TFT (HiVIT) was increased to ∼1018cm-3. Which reduced channel resistance and therefore the voltage drop in the ungated offset region during the on-state. To further decrease the electric field in the offset region, we applied Ta capping and subsequent oxidation to locally increase the oxygen vacancy levels in the offset region thereby increasing local carrier density. The reduction of the drain field in the offset region from 1.90 Vµm-1to 1.46 Vµm-1at 200 V drain voltage, significantly improved the operational stability of the device by reducing high field degradation. At an extreme drain voltage of 500 V, the device showed an off-state current of ∼10-11A and on-state current of ∼1.59 mA demonstrating that with further enhancements the HiVIT may be applicable to thin-film form, low leakage, high voltage control applications.

Specific contact resistivity reduction in amorphous IGZO thin-film transistors through a TiN/IGTO heterogeneous interlayer.

Oxide semiconductors have gained significant attention in electronic device industry due to their high potential for emerging thin-film transistor (TFT) applications. However, electrical contact properties such as specific contact resistivity (ρC) and width-normalized contact resistance (RCW) are significantly inferior in oxide TFTs compared to conventional silicon metal oxide semiconductor field-effect transistors. In this study, a multi-stack interlayer (IL) consisting of titanium nitride (TiN) and indium-gallium-tin-oxide (IGTO) is inserted between source/drain electrodes and amorphous indium-gallium-zinc-oxide (IGZO). The TiN is introduced to increase conductivity of the underlying layer, while IGTO acts as an n+-layer. Our findings reveal IGTO thickness (tIGTO)-dependent electrical contact properties of IGZO TFT, where ρC and RCW decrease as tIGTO increases to 8 nm. However, at tIGTO > 8 nm, they increase mainly due to IGTO crystallization-induced contact interface aggravation. Consequently, the IGZO TFTs with a TiN/IGTO (3/8 nm) IL reveal the lowest ρC and RCW of 9.0 × 10-6 Ω·cm2 and 0.7 Ω·cm, significantly lower than 8.0 × 10-4 Ω·cm2 and 6.9 Ω·cm in the TFTs without the IL, respectively. This improved electrical contact properties increases field-effect mobility from 39.9 to 45.0 cm2/Vs. This study demonstrates the effectiveness of this multi-stack IL approach in oxide TFTs.

Strong Immunity to Drain-Induced Barrier Lowering in ALD-Grown Preferentially Oriented Indium Gallium Oxide Transistors.

Drain-induced barrier lowering (DIBL) is one of the most critical obstacles degrading the reliability of integrated circuits based on miniaturized transistors. Here, the effect of a crystallographic structure change in InGaO [indium gallium oxide (IGO)] thin-films on the DIBL was investigated. Preferentially oriented IGO (po-IGO) thin-film transistors (TFTs) have outstanding device performances with a field-effect mobility of 81.9 ± 1.3 cm2/(V s), a threshold voltage (VTH) of 0.07 ± 0.03 V, a subthreshold swing of 127 ± 2.0 mV/dec, and a current modulation ratio of (2.9 ± 0.2) × 1011. They also exhibit highly reliable electrical characteristics with a negligible VTH shift of +0.09 (-0.14) V under +2 (-2) MV/cm and 60 °C for 3600 s. More importantly, they reveal strong immunity to the DIBL of 17.5 ± 1.2 mV/V, while random polycrystalline In2O3 (rp-In2O3) and IGO (rp-IGO) TFTs show DIBL values of 197 ± 5.3 and 46.4 ± 1.2 mV/V, respectively. This is quite interesting because the rp- and po-IGO thin-films have the same cation composition ratio (In/Ga = 8:2). Given that the lateral diffusion of oxygen vacancies from the source/drain junction to the channel region via grain boundaries can reduce the effective length (Leff) of the oxide channel, this improved immunity could be attributed to suppressed lateral diffusion by preferential growth. In practice, the po-IGO TFTs have a longer Leff than the rp-In2O3 and -IGO TFTs even with the same patterned length. The effect of the crystallographic-structure-dependent Leff variation on the DIBL was corroborated by technological computer-aided design simulation. This work suggests that the atomic-layer-deposited po-IGO thin-film can be a promising candidate for next-generation electronic devices composed of the miniaturized oxide transistors.

Oxide and 2D TMD semiconductors for 3D DRAM cell transistors.

As the downscaling of conventional dynamic random-access memory (DRAM) has reached its limits, 3D DRAM has been proposed as a next-generation DRAM cell architecture. However, incorporating silicon into 3D DRAM technology faces various challenges in securing cost-effective high cell transistor performance. Therefore, many researchers are exploring the application of next-generation semiconductor materials, such as transition oxide semiconductors (OSs) and metal dichalcogenides (TMDs), to address these challenges and to realize 3D DRAM. This study provides an overview of the proposed structures for 3D DRAM, compares the characteristics of OSs and TMDs, and discusses the feasibility of employing the OSs and TMDs as the channel material for 3D DRAM. Furthermore, we review recent progress in 3D DRAM using the OSs, discussing their potential to overcome challenges in silicon-based approaches.

Double-gate structure enabling remote Coulomb scattering-free transport in atomic-layer-deposited IGO thin-film transistors with HfO2 gate dielectric through insertion of SiO2 interlayer.

In this paper, high-performance indium gallium oxide (IGO) thin-film transistor (TFT) with a double-gate (DG) structure was developed using an atomic layer deposition route. The device consisting of 10-nm-thick IGO channel and 2/48-nm-thick SiO2/HfO2 dielectric was designed to be suitable for a display backplane in augmented and virtual reality applications. The fabricated DG TFTs exhibit outstanding device performances with field-effect mobility (µFE) of 65.1 ± 2.3 cm2V-1 s-1, subthreshold swing of 65 ± 1 mVdec-1, and threshold voltage (VTH) of 0.42 ± 0.05 V. Both the (µFE) and SS are considerably improved by more than two-fold in the DG IGO TFTs compared to single-gate (SG) IGO TFTs. Important finding was that the DG mode of IGO TFTs exhibits the nearly temperature independent µFE variations in contrast to the SG mode which suffers from the severe remote Coulomb scattering. The rationale for this disparity is discussed in detail based on the potential distribution along the vertical direction using technology computer-aided design simulation. Furthermore, the DG IGO TFTs exhibit a greatly improved reliability with negligible VTH shift of - 0.22 V under a harsh negative bias thermal and illumination stress condition with an electric field of - 2 MVcm-1 and blue light illumination at 80 °C for 3600 s. It could be attributed to the increased electrostatic potential that results in fast re-trapping of the electrons generated by the light-induced ionization of deep level oxygen vacancy defects.

Tailoring Subthreshold Swing in A-IGZO Thin-Film Transistors for Amoled Displays: Impact of Conversion Mechanism on Peald Deposition Sequences.

Amorphous IGZO (a-IGZO) thin-film transistors (TFTs) are standard backplane electronics to power active-matrix organic light-emitting diode (AMOLED) televisions due to their high carrier mobility and negligible low leakage characteristics. Despite their advantages, limitations in color depth arise from a steep subthreshold swing (SS) (≤ 0.1 V/decade), necessitating costly external compensation for IGZO transistors. For mid-size mobile applications such as OLED tablets and notebooks, it is important to ensure controllable SS value (≥ 0.3 V/decade). In this study, a conversion mechanism during plasma-enhanced atomic layer deposition (PEALD) is proposed as a feasible route to control the SS. When a pulse of a diethylzinc (DEZn) precursor is exposed to the M2 O3 (M = In or Ga) surface layer, partial conversion of the underlying M2 O3 to ZnO is predicted on the basis of density function theory calculations. Notably, significant distinctions between In-Ga-Zn (Case I) and In-Zn-Ga (Case II) films are observed: Case II exhibits a lower growth rate and larger Ga/In ratio. Case II TFTs with a-IGZO (subcycle ratio of In:Ga:Zn = 3:1:1) show reasonable SS values (313 mV decade-1 ) and high mobility (µFE ) of 29.3 cm2 Vs-1 (Case I: 84 mV decade-1 and 33.4 cm2 Vs-1 ). The rationale for Case II's reasonable SS values is discussed, attributing it to the plausible formation of In-Zn defects, supported by technology computer-aided design (TCAD) simulations.

Comparative Study on Indium Precursors for Plasma-Enhanced Atomic Layer Deposition of In2O3 and Application to High-Performance Field-Effect Transistors.

Indium oxide (In2O3) is a transparent wide-bandgap semiconductor suitable for use in the back-end-of-line-compatible channel layers of heterogeneous monolithic three-dimensional (M3D) devices. The structural, chemical, and electrical properties of In2O3 films deposited by plasma-enhanced atomic layer deposition (PEALD) were examined using two different liquid-based precursors: (3-(dimethylamino)propyl)-dimethyl indium (DADI) and (N,N-dimethylbutylamine)trimethylindium (DATI). DATI-derived In2O3 films had higher growth per cycle (GPC), superior crystallinity, and low defect density compared with DADI-derived In2O3 films. Density functional theory calculations revealed that the structure of DATI can exhibit less steric hindrance compared with that of DADI, explaining the superior physical and electrical properties of the DATI-derived In2O3 film. DATI-derived In2O3 field-effect transistors (FETs) exhibited unprecedented performance, showcasing a high field-effect mobility of 115.8 cm2/(V s), a threshold voltage of -0.12 V, and a low subthreshold gate swing value of <70 mV/decade. These results were achieved by employing a 10-nm-thick HfO2 gate dielectric layer with an effective oxide thickness of 3.9 nm. Both DADI and DATI-derived In2O3 FET devices exhibited remarkable stability under bias stress conditions due to a high-quality In2O3 channel layer, good gate dielectric/channel interface matching, and a suitable passivation layer. These findings underscore the potential of ALD In2O3 films as promising materials for upper-layer channels in the next generation of M3D devices.

High-Performance Indium-Based Oxide Transistors with Multiple Channels Through Nanolaminate Structure Fabricated by Plasma-Enhanced Atomic Layer Deposition.

An atomic-layer-deposited oxide nanolaminate (NL) structure with 3 dyads where a single dyad consists of a 2-nm-thick confinement layer (CL) (In0.84Ga0.16O or In0.75Zn0.25O), and a barrier layer (BL) (Ga2O3) was designed to obtain superior electrical performance in thin-film transistors (TFTs). Within the oxide NL structure, multiple-channel formation was demonstrated by a pile-up of free charge carriers near CL/BL heterointerfaces in the form of the so-called quasi-two-dimensional electron gas (q2DEG), which leads to an outstanding carrier mobility (µFE) with band-like transport, steep gate swing (SS), and positive threshold voltage (VTH) behavior. Furthermore, reduced trap densities in oxide NL compared to those of conventional oxide single-layer TFTs ensures excellent stabilities. The optimized device with the In0.75Zn0.25O/Ga2O3 NL TFT showed remarkable electrical performance: µFE of 77.1 ± 0.67 cm2/(V s), VTH of 0.70 ± 0.25 V, SS of 100 ± 10 mV/dec, and ION/OFF of 8.9 × 109 with a low operation voltage range of ≤2 V and excellent stabilities (ΔVTH of +0.27, -0.55, and +0.04 V for PBTS, NBIS, and CCS, respectively). Based on in-depth analyses, the enhanced electrical performance is attributed to the presence of q2DEG formed at carefully engineered CL/BL heterointerfaces. Technological computer-aided design (TCAD) simulation was performed theoretically to confirm the formation of multiple channels in an oxide NL structure where the formation of a q2DEG was verified in the vicinity of CL/BL heterointerfaces. These results clearly demonstrate that introducing a heterojunction or NL structure concept into this atomic layer deposition (ALD)-derived oxide semiconductor system is a very effective strategy to boost the carrier-transporting properties and improve the photobias stability in the resulting TFTs.

High Mobility IZTO Thin-Film Transistors Based on Spinel Phase Formation at Low Temperature through a Catalytic Chemical Reaction.

In this paper, In0.22 Znδ Sn0.78- δ O1.89- δ (δ = 0.55) films with a single spinel phase are successfully grown at the low temperature of 300 °C through careful cation composition design and a catalytic chemical reaction. Thin-film transistors (TFTs) with amorphous In0 .22 Znδ Sn0.78- δ O1.89- δ (δ = 0.55) channel layers have a reasonable mobility of 41.0 cm2 V-1 s-1 due to the synergic intercalation of In and Sn ions. In contrast, TFTs with polycrystalline spinel In0 .22 Znδ Sn0.78- δ O1.89- δ (δ = 0.55) channel layers, achieved through a metal-induced crystallization at 300 °C, exhibit a remarkably high field-effect mobility of ≈83.2 cm2 V-1 s-1 and excellent stability against external gate bias stress, which is attributed to the uniform formation of the highly ordered spinel phase. The relationships between cation composition, microstructure, and performance for the In2 O3 -ZnO-SnO2 ternary component system are investigated rigorously to attain in-depth understanding of the roles of various crystalline phases, including spinel Zn2- y Sn1- y In2 y O4 (y = 0.45), bixbyite In2-2 x Znx Inx O4 (x = 0.4), rutile SnO2 , and a homologous compound of compound (ZnO)k (In2 O3 ) (k = 5). This work concludes that the cubic spinel phase of Zn2- y Sn1- y In2 y O4 (y = 0.45) film is a strong contender as a substitute for semiconducting polysilicon as a backplane channel ingredient for mobile active-matrix organic light-emitting diode displays.

Progress, Challenges, and Opportunities in Oxide Semiconductor Devices: A Key Building Block for Applications Ranging from Display Backplanes to 3D Integrated Semiconductor Chips.

As Si has faced physical limits on further scaling down, novel semiconducting materials such as 2D transition metal dichalcogenides and oxide semiconductors (OSs) have gained tremendous attention to continue the ever-demanding downscaling represented by Moore's law. Among them, OS is considered to be the most promising alternative material because it has intriguing features such as modest mobility, extremely low off-current, great uniformity, and low-temperature processibility with conventional complementary-metal-oxide-semiconductor-compatible methods. In practice, OS has successfully replaced hydrogenated amorphous Si in high-end liquid crystal display devices and has now become a standard backplane electronic for organic light-emitting diode displays despite the short time since their invention in 2004. For OS to be implemented in next-generation electronics such as back-end-of-line transistor applications in monolithic 3D integration beyond the display applications, however, there is still much room for further study, such as high mobility, immune short-channel effects, low electrical contact properties, etc. This study reviews the brief history of OS and recent progress in device applications from a material science and device physics point of view. Simultaneously, remaining challenges and opportunities in OS for use in next-generation electronics are discussed.

Hydrogen-Doping-Enabled Boosting of the Carrier Mobility and Stability in Amorphous IGZTO Transistors.

This study investigated the effect of hydrogen (H) on the performance of amorphous In-Ga-Zn-Sn oxide (a-In0.29Ga0.35Zn0.11Sn0.25O) thin-film transistors (TFTs). Ample H in plasma-enhanced atomic layer deposition (PEALD)-derived SiO2 can diffuse into the underlying a-IGZTO film during the postdeposition annealing (PDA) process, which affects the electrical properties of the resulting TFTs due to its donor behavior in the a-IGZTO. The a-In0.29Ga0.35Zn0.11Sn0.25O TFTs at the PDA temperature of 400 °C exhibited a remarkably higher field-effect mobility (µFE) of 85.9 cm2/Vs, a subthreshold gate swing (SS) of 0.33 V/decade, a threshold voltage (VTH) of -0.49 V, and an ION/OFF ratio of ∼108; these values are superior compared to those of unpassivated a-In0.29Ga0.35Zn0.11Sn0.25O TFTs (µFE = 23.3 cm2/Vs, SS = 0.36 V/decade, and VTH = -3.33 V). In addition, the passivated a-In0.29Ga0.35Zn0.11Sn0.25O TFTs had good stability against the external gate bias duration. This performance change can be attributed to the substitutional H doping into oxygen sites (HO) leading to a boost in ne and µFE. In contrast, the beneficial HO effect was barely observed for amorphous indium gallium zinc oxide (a-IGZO) TFTs, suggesting that the hydrogen-doping-enabled boosting of a-IGZTO TFTs is strongly related to the existence of Sn cations. Electronic calculations of VO and HO using density functional theory (DFT) were performed to explain this disparity. The introduction of SnO2 in a-IGZO is predicted to cause a conversion from shallow VO to deep VO due to the lower formation energy of deep VO, which is effectively created around Sn cations. The formation of HO by H doping in the IGZTO facilitates the efficient connection of atomic states forming the conduction band more smoothly. This reduces the effective mass and enhances the carrier mobility.

High-Performance Thin-Film Transistor with Atomic Layer Deposition (ALD)-Derived Indium-Gallium Oxide Channel for Back-End-of-Line Compatible Transistor Applications: Cation Combinatorial Approach.

In this paper, the feasibility of an indium-gallium oxide (In2(1-x)Ga2xOy) film through combinatorial atomic layer deposition (ALD) as an alternative channel material for back-end-of-line (BEOL) compatible transistor applications is studied. The microstructure of random polycrystalline In2Oy with a bixbyite structure was converted to the amorphous phase of In2(1-x)Ga2xOy film under thermal annealing at 400 °C when the fraction of Ga is ≥29 at. %. In contrast, the enhancement in the orientation of the (222) face and subsequent grain size was observed for the In1.60Ga0.40Oy film with the intermediate Ga fraction of 20 at. %. The suitability as a channel layer was tested on the 10-nm-thick HfO2 gate oxide where the natural length was designed to meet the requirement of short channel devices with a smaller gate length (<100 nm). The In1.60Ga0.40Oy thin-film transistors (TFTs) exhibited the high field-effect mobility (µFE) of 71.27 ± 0.98 cm2/(V s), low subthreshold gate swing (SS) of 74.4 mV/decade, threshold voltage (VTH) of -0.3 V, and ION/OFF ratio of >108, which would be applicable to the logic devices such as peripheral circuit of heterogeneous DRAM. The in-depth origin for this promising performance was discussed in detail, based on physical, optical, and chemical analysis.

Comparative Study of Atomic Layer Deposited Indium-Based Oxide Transistors with a Fermi Energy Level-Engineered Heterojunction Structure Channel through a Cation Combinatorial Approach.

Amorphous indium-gallium-zinc oxide (a-IGZO) has become a standard channel ingredient of switching/driving transistors in active-matrix organic light-emitting diode (AMOLED) televisions. However, mobile AMOLED displays with a high pixel density (≥500 pixels per inch) and good form factor do not often employ a-IGZO transistors due to their modest mobility (10-20 cm2/(V s)). Hybrid low-temperature polycrystalline silicon and oxide transistor (LTPO) technology is being adapted in high-end mobile AMOLED devices due to its ultralow power consumption and excellent current drivability. The critical issues of LTPO (including a complicated structure and high fabrication costs) require a search for alternative all-oxide thin-film transistors (TFTs) with low-cost processability and simple device architecture. The atomic layer deposition (ALD) method is a promising route for high-performance all-oxide TFTs due to its unique features, such as in situ cation composition tailoring ability, precise nanoscale thickness controllability, and excellent step coverage. Here, we report an in-depth comparative investigation of TFTs with indium-gallium oxide (IGO)/gallium-zinc oxide (GZO) and indium-zinc oxide (IZO)/GZO heterojunction stacks using an ALD method. IGO and IZO layers with different compositions were tested as a confinement layer (CL), whereas the GZO layer was used as a barrier layer (BL). Optimal IGO/GZO and IZO/GZO channels were carefully designed on the basis of their energy band properties, where the formation of a quasi-two-dimensional electron gas (q2DEG) near the CL/BL interface is realized by rational design of the band gaps and work-functions of the IGO, IZO, and GZO thin films. To verify the effect of q2DEG formation, the device performances and stabilities of TFTs with CL/BL oxide heterojunction stacks were examined and compared to those of TFTs with a single CL layer. The optimized device with the In0.75Zn0.25O/Ga0.80Zn0.20O stack showed remarkable electrical performance: µFE of 76.7 ± 0.51 cm2/(V s), VTH of -0.37 ± 0.19 V, SS of 0.13 ± 0.01 V/dec, and ION/OFF of 2.5 × 1010 with low operation voltage range of ≥2 V and excellent stabilities (ΔVTH of +0.35, -0.67, and +0.08 V for PBTS, NBIS, and CCS, respectively). This study suggests the feasibility of using high-performance ALD-derived oxide TFTs (which can compete with the performance of LTPO transistors) for high-end mobile AMOLED displays.

High-Performance Broadband Phototransistor Based on TeOx/IGTO Heterojunctions.

Ultraviolet to infrared broadband spectral detection capability is a technological challenge for sensing materials being developed for high-performance photodetection. In this work, we stacked 9 nm-thick tellurium oxide (TeOx) and 8 nm-thick InGaSnO (IGTO) into a heterostructure at a low temperature of 150 °C. The superior photoelectric characteristics we achieved benefit from the intrinsic optical absorption range (300-1500 nm) of the hexagonal tellurium (Te) phase in the TeOx film, and photoinduced electrons are driven effectively by band alignment at the TeOx/IGTO interface under illumination. A photosensor based on our optimized heterostructure exhibited a remarkable detectivity of 1.6 × 1013 Jones, a responsivity of 84 A/W, and a photosensitivity of 1 × 105, along with an external quantum efficiency of 222% upon illumination by blue light (450 nm). Simultaneously, modest detection properties (responsivity: ∼31 A/W, detectivity: ∼6 × 1011 Jones) for infrared irradiation at 970 nm demonstrate that this heterostructure can be employed as a broadband phototransistor. Furthermore, its low-temperature processability suggests that our proposed concept might be used to design array optoelectronic devices for wide band detection with high sensitivity, flexibility, and stability.

High-Performance Indium Gallium Tin Oxide Transistors with an Al2O3 Gate Insulator Deposited by Atomic Layer Deposition at a Low Temperature of 150 °C: Roles of Hydrogen and Excess Oxygen in the Al2O3 Dielectric Film.

In this work, high-performance amorphous In0.75Ga0.23Sn0.02O (a-IGTO) transistors with an atomic layer-deposited Al2O3 dielectric layer were fabricated at a maximum processing temperature of 150 °C. Hydrogen (H) and excess oxygen (Oi) in the Al2O3 film, which was controlled by adjusting the oxygen radical density (PO2: flow rate of O2/[Ar+O2]) in the radio-frequency (rf) plasma during ALD growth of Al2O3, significantly affected the performance and stability of the resulting IGTO transistors. The concentrations of H and Oi in Al2O3/IGTO stacks according to PO2 were characterized by secondary ion mass spectroscopy, X-ray photoelectron spectroscopy, hard X-ray photoemission spectroscopy, and thermal desorption spectroscopy. The high concentration of H at a low PO2 of 2.5% caused heavy electron doping in the underlying IGTO during thermal annealing at 150 °C, leading to a conductive behavior in the resulting transistor without modulation capability. In contrast, a high PO2 condition of 20% introduced O2 molecules (or Oi) into the Al2O3 film, which negatively impacted the carrier mobility and caused anomalous photo-bias instability in the IGTO transistor. Through in-depth understanding of how to manipulate H and Oi in Al2O3 by controlling the PO2, we fabricated high-performance IGTO transistors with a high field-effect mobility (µFE) of 58.8 cm2/Vs, subthreshold gate swing (SS) of 0.12 V/decade, threshold voltage (VTH) of 0.5 V, and ION/OFF ratio of ∼109 even at the maximum processing temperature of 150 °C. Simultaneously, the optimized devices were resistant to exposure to external positive gate bias stress (PBS) and negative bias stress (NBS) for 3600 s, where the VTH shifts for exposure to PBS and NBS for this duration were 0.1 V and -0.15 V, respectively.

Achieving a Low-Voltage, High-Mobility IGZO Transistor through an ALD-Derived Bilayer Channel and a Hafnia-Based Gate Dielectric Stack.

Ultrahigh-resolution displays for augmented reality (AR) and virtual reality (VR) applications require a novel architecture and process. Atomic-layer deposition (ALD) enables the facile fabrication of indium-gallium zinc oxide (IGZO) thin-film transistors (TFTs) on a substrate with a nonplanar surface due to its excellent step coverage and accurate thickness control. Here, we report all-ALD-derived TFTs using IGZO and HfO2 as the channel layer and gate insulator, respectively. A bilayer IGZO channel structure consisting of a 10 nm base layer (In0.52Ga0.29Zn0.19O) with good stability and a 3 nm boost layer (In0.82Ga0.08Zn0.10O) with extremely high mobility was designed based on a cation combinatorial study of the ALD-derived IGZO system. Reducing the thickness of the HfO2 dielectric film by the ALD process offers high areal capacitance in field-effect transistors, which allows low-voltage drivability and enhanced carrier transport. The intrinsic inferior stability of the HfO2 gate insulator was effectively mitigated by the insertion of an ALD-derived 4 nm Al2O3 interfacial layer between HfO2 and the IGZO film. The optimized bilayer IGZO TFTs with HfO2-based gate insulators exhibited excellent performances with a high field-effect mobility of 74.0 ± 0.91 cm2/(V s), a low subthreshold swing of 0.13 ± 0.01 V/dec, a threshold voltage of 0.20 ± 0.24 V, and an ION/OFF of ∼3.2 × 108 in a low-operation-voltage (≤2 V) range. This promising result was due to the synergic effects of a bilayer IGZO channel and HfO2-based gate insulator with a high permittivity, which were mainly attributed to the effective carrier confinement in the boost layer with high mobility, low free carrier density of the base layer with a low VO concentration, and HfO2-induced high effective capacitance.

High-Performance Thin-Film Transistors with an Atomic-Layer-Deposited Indium Gallium Oxide Channel: A Cation Combinatorial Approach.

The effect of gallium (Ga) concentration on the structural evolution of atomic-layer-deposited indium gallium oxide (IGO) (In1-xGaxO) films as high-mobility n-channel semiconducting layers was investigated. Different Ga concentrations in 10-13 nm thick In1-xGaxO films allowed versatile phase structures to be amorphous, highly ordered, and randomly oriented crystalline by thermal annealing at either 400 or 700 °C for 1 h. Heavy Ga concentrations above 34 atom % caused a phase transformation from a polycrystalline bixbyite to an amorphous IGO film at 400 °C, while proper Ga concentration produced a highly ordered bixbyite crystal structure at 700 °C. The resulting highly ordered In0.66Ga0.34O film show unexpectedly high carrier mobility (µFE) values of 60.7 ± 1.0 cm2 V-1 s-1, a threshold voltage (VTH) of -0.80 ± 0.05 V, and an ION/OFF ratio of 5.1 × 109 in field-effect transistors (FETs). In contrast, the FETs having polycrystalline In1-xGaxO films with higher In fractions (x = 0.18 and 0.25) showed reasonable µFE values of 40.3 ± 1.6 and 31.5 ± 2.4 cm2 V-1 s-1, VTH of -0.64 ± 0.40 and -0.43 ± 0.06 V, and ION/OFF ratios of 2.5 × 109 and 1.4 × 109, respectively. The resulting superior performance of the In0.66Ga0.34O-film-based FET was attributed to a morphology having fewer grain boundaries, with higher mass densification and lower oxygen vacancy defect density of the bixbyite crystallites. Also, the In0.66Ga0.34O transistor was found to show the most stable behavior against an external gate bias stress.

Boosting carrier mobility and stability in indium-zinc-tin oxide thin-film transistors through controlled crystallization.

We investigated the effect of film thickness (geometrical confinement) on the structural evolution of sputtered indium-zinc-tin oxide (IZTO) films as high mobility n-channel semiconducting layers during post-treatment at different annealing temperatures ranging from 350 to 700 °C. Different thicknesses result in IZTO films containing versatile phases, such as amorphous, low-, and high-crystalline structures even after annealing at 700 °C. A 19-nm-thick IZTO film clearly showed a phase transformation from initially amorphous to polycrystalline bixbyite structures, while the ultra-thin film (5 nm) still maintained an amorphous phase. Transistors including amorphous and low crystalline IZTO films fabricated at 350 and 700 °C show reasonable carrier mobility (µFE) and on/off current ratio (ION/OFF) values of 22.4-35.9 cm2 V-1 s-1 and 1.0-4.0 × 108, respectively. However, their device instabilities against positive/negative gate bias stresses (PBS/NBS) are unacceptable, originating from unsaturated bonding and disordered sites in the metal oxide films. In contrast, the 19-nm-thick annealed IZTO films included highly-crystalline, 2D spherulitic crystallites and fewer grain boundaries. These films show the highest µFE value of 39.2 cm2 V-1 s-1 in the transistor as well as an excellent ION/OFF value of 9.7 × 108. Simultaneously, the PBS/NBS stability of the resulting transistor is significantly improved under the same stress condition. This promising superior performance is attributed to the crystallization-induced lattice ordering, as determined by highly-crystalline structures and the associated formation of discrete donor levels (~ 0.31 eV) below the conduction band edge.

Complementary Hybrid Semiconducting Superlattices with Multiple Channels and Mutual Stabilization.

An organic-inorganic hybrid superlattice with near perfect synergistic integration of organic and inorganic constituents was developed to produce properties vastly superior to those of either moiety alone. The complementary hybrid superlattice is composed of multiple quantum wells of 4-mercaptophenol organic monolayers and amorphous ZnO nanolayers. Within the superlattice, multichannel formation was demonstrated at the organic-inorganic interfaces to produce an excellent-performance field effect transistor exhibiting outstanding field-effect mobility with band-like transport and steep subthreshold swing. Furthermore, mutual stabilizations between organic monolayers and ZnO effectively reduced the performance degradation notorious in exclusively organic and ZnO transistors.