Probabilistic Circuit Implementation Based on P-Bits Using the Intrinsic Random Property of RRAM and P-Bit Multiplexing Strategy.

Probabilistic computing is an emerging computational paradigm that uses probabilistic circuits to efficiently solve optimization problems such as invertible logic, where traditional digital computations are difficult to solve. This paper proposes a true random number generator (TRNG) based on resistive random-access memory (RRAM), which is combined with an activation function implemented by a piecewise linear function to form a standard p-bit cell, one of the most important parts of a p-circuit. A p-bit multiplexing strategy is also applied to reduce the number of p-bits and improve resource utilization. To verify the superiority of the proposed probabilistic circuit, we implement the invertible p-circuit on a field-programmable gate array (FPGA), including AND gates, full adders, multi-bit adders, and multipliers. The results of the FPGA implementation show that our approach can significantly save the consumption of hardware resources.

Evolution of the conductive filament system in HfO2-based memristors observed by direct atomic-scale imaging.

The resistive switching effect in memristors typically stems from the formation and rupture of localized conductive filament paths, and HfO2 has been accepted as one of the most promising resistive switching materials. However, the dynamic changes in the resistive switching process, including the composition and structure of conductive filaments, and especially the evolution of conductive filament surroundings, remain controversial in HfO2-based memristors. Here, the conductive filament system in the amorphous HfO2-based memristors with various top electrodes is revealed to be with a quasi-core-shell structure consisting of metallic hexagonal-Hf6O and its crystalline surroundings (monoclinic or tetragonal HfOx). The phase of the HfOx shell varies with the oxygen reservation capability of the top electrode. According to extensive high-resolution transmission electron microscopy observations and ab initio calculations, the phase transition of the conductive filament shell between monoclinic and tetragonal HfO2 is proposed to depend on the comprehensive effects of Joule heat from the conductive filament current and the concentration of oxygen vacancies. The quasi-core-shell conductive filament system with an intrinsic barrier, which prohibits conductive filament oxidation, ensures the extreme scalability of resistive switching memristors. This study renovates the understanding of the conductive filament evolution in HfO2-based memristors and provides potential inspirations to improve oxide memristors for nonvolatile storage-class memory applications.

Sensing Circuit Design Techniques for RRAM in Advanced CMOS Technology Nodes.

Resistive random access memory (RRAM) is one of the most promising new nonvolatile memories because of its excellent properties. Moreover, due to fast read speed and low work voltage, it is suitable for seldom-write frequent-read applications. However, as technology nodes shrink, RRAM faces many issues, which can significantly degrade RRAM performance. Therefore, it is necessary to optimize the sensing schemes to improve the application range of RRAM. In this paper, the issues faced by RRAM in advanced technology nodes are summarized. Then, the advantages and weaknesses in the novel design and optimization methodologies of sensing schemes are introduced in detail from three aspects, the reference schemes, sensing amplifier schemes, and bit line (BL)-enhancing schemes, according to the development of technology in especially recent years, which can be the reference for designing the sensing schemes. Moreover, the waveforms and results of each method are illustrated to make the design easy to understand. With the development of technology, the sensing schemes of RRAM become higher speed and resolution, low power consumption, and are applied at advanced technology nodes and low working voltage. Now, the most advanced nodes the RRAM applied is 14 nm node, the lowest working voltage can reach 0.32 V, and the shortest access time can be only a few nanoseconds.

A 1T2C FeCAP-Based In-Situ Bitwise X(N)OR Logic Operation with Two-Step Write-Back Circuit for Accelerating Compute-In-Memory.

Ferroelectric capacitors (FeCAPs) with high process compatibility, high reliability, ultra-low programming current and fast operation speed are promising candidates to traditional volatile and nonvolatile memory. In addition, they have great potential in the fields of storage, computing, and memory logic. Nevertheless, effective methods to realize logic and memory in FeCAP devices are still lacking. This study proposes a 1T2C FeCAP-based in situ bitwise X(N)OR logic based on a charge-sharing function. First, using the 1T2C structure and a two-step write-back circuit, the nondestructive reading is realized with less complexity than the previous work. Second, a method of two-line activation is used during the operation of X(N)OR. The verification results show that the speed, area and power consumption of the proposed 1T2C FeCAP-based bitwise logic operations are significantly improved.

Oxide-Based Electrolyte-Gated Transistors for Spatiotemporal Information Processing.

Spiking neural networks (SNNs) sharing large similarity with biological nervous systems are promising to process spatiotemporal information and can provide highly time- and energy-efficient computational paradigms for the Internet-of-Things and edge computing. Nonvolatile electrolyte-gated transistors (EGTs) provide prominent analog switching performance, the most critical feature of synaptic element, and have been recently demonstrated as a promising synaptic device. However, high performance, large-scale EGT arrays, and EGT application for spatiotemporal information processing in an SNN are yet to be demonstrated. Here, an oxide-based EGT employing amorphous Nb2 O5 and Lix SiO2 is introduced as the channel and electrolyte gate materials, respectively, and integrated into a 32 × 32 EGT array. The engineered EGTs show a quasi-linear update, good endurance (106 ) and retention, a high switching speed of 100 ns, ultralow readout conductance (<100 nS), and ultralow areal switching energy density (20 fJ µm-2 ). The prominent analog switching performance is leveraged for hardware implementation of an SNN with the capability of spatiotemporal information processing, where spike sequences with different timings are able to be efficiently learned and recognized by the EGT array. Finally, this EGT-based spatiotemporal information processing is deployed to detect moving orientation in a tactile sensing system. These results provide an insight into oxide-based EGT devices for energy-efficient neuromorphic computing to support edge application.

Microscopic Mechanism of Carbon-Dopant Manipulating Device Performance in CGeSbTe-Based Phase Change Random Access Memory.

Carbon (C)-doped Ge2Sb2Te5 material is a potential candidate in phase change random access memory (PCRAM) because of its superb thermal stability and ultrahigh cycle endurance. Unfortunately, the role and distribution evolution of C-dopant is still not fully understood, especially in practical industrial devices. In this report, with the aid of advanced spherical aberration corrected transmission electron microscopy, the mechanism of microstructure evolution manipulated by C-dopant is clearly defined. The grain-inner C atoms distinctly increase cationic migration energy barriers, which is the fundamental reason for promoting the thermal stability of metastable face-centered-cubic phase and postponing its transition to the hexagonal structure. By current pulses stimulation, the stochastic grain-outer C clusters tend to aggregate in the active area by breaking C-Ge bonding; thus, grain growth and elemental segregation are effectively suppressed to improve device reliability, for example, lower SET resistance, shorter SET time, and enlarged RESET/SET ratio. In short, the visual distribution variations of C-dopant can manipulate the performance of the PCRAM device, having much broader implications for optimizing its microstructure transition and understanding C-doped material system.

A highly CMOS compatible hafnia-based ferroelectric diode.

Memory devices with high speed and high density are highly desired to address the 'memory wall' issue. Here we demonstrated a highly scalable, three-dimensional stackable ferroelectric diode, with its rectifying polarity modulated by the polarization reversal of Hf0.5Zr0.5O2 films. By visualizing the hafnium/zirconium lattice order and oxygen lattice order with atomic-resolution spherical aberration-corrected STEM, we revealed the correlation between the spontaneous polarization of Hf0.5Zr0.5O2 film and the displacement of oxygen atom, thus unambiguously identified the non-centrosymmetric Pca21 orthorhombic phase in Hf0.5Zr0.5O2 film. We further implemented this ferroelectric diode in an 8 layers 3D array. Operation speed as high as 20 ns and robust endurance of more than 109 were demonstrated. The built-in nonlinearity of more than 100 guarantees its self-selective property that eliminates the need for external selectors to suppress the leakage current in large array. This work opens up new opportunities for future memory hierarchy evolution.

Modulating the filament rupture degree of threshold switching device for self-selective and low-current nonvolatile memory application.

Resistive switching devices have tremendous potential for memory, logic, and neuromorphic computing applications. Cation-based resistive switching devices intrinsically show nonvolatile memory characteristics under high compliance current (I CC), while show volatile threshold switching (TS) selector characteristics under low I CC. However, separate researches about cation-based memory or selector are hard to evade the typical current-retention dilemma, which results in the hardship to obtain low-current memory and high-current selector. Here, we propose a novel strategy to realize nonvolatile storage characteristics in a volatile TS device by modulating the rupture degree of conductive filament (CF). Enlarging the rupture degree of the CF with a certain RESET process, as confirmed by transmission electron microscope and energy dispersive spectrometry results, the threshold voltage of the Ag/HfO2/Pt TS devices can be enlarged from 0.9 to 2.8 V. Generation of the voltage difference enables the volatile TS devices the ability of self-selective nonvolatile storage. Increasing the RESET magnitude and shrinking the device size have been proved effective ways to increase the read window of the TS memory (TSM) devices. Evading the limit of the current-retention dilemma, ultra-low energy dissipation can be obtained by decreasing I CC to nA level. With self-selective, low-energy, and potential high-density integration characteristics, the proposed TSM device can act as a potential supplement of novel storage class memories.

Suppression of Filament Overgrowth in Conductive Bridge Random Access Memory by Ta2O5/TaOx Bi-Layer Structure.

Bi-layer structure has been widely adopted to improve the reliability of the conductive bridge random access memory (CBRAM). In this work, we proposed a convenient and economical solution to achieve a Ta2O5/TaOx bi-layer structure by using a low-temperature annealing process. The addition of a TaOx layer acted as an external resistance suppressing the overflow current during set programming, thus achieving the self-compliance switching. As a result, the distributions of high-resistance states and low-resistance states are improved due to the suppression of the overset phenomenon. In addition, the LRS retention of the CBRAM is obviously enhanced due to the recovery of defects in the switching film. This work provides a simple and economical method to improve the reliability of CBRAM.

Breaking the Current-Retention Dilemma in Cation-Based Resistive Switching Devices Utilizing Graphene with Controlled Defects.

Cation-based resistive switching (RS) devices, dominated by conductive filaments (CF) formation/dissolution, are widely considered for the ultrahigh density nonvolatile memory application. However, the current-retention dilemma that the CF stability deteriorates greatly with decreasing compliance current makes it hard to decrease operating current for memory application and increase driving current for selector application. By centralizing/decentralizing the CF distribution, this current-retention dilemma of cation-based RS devices is broken for the first time. Utilizing the graphene impermeability, the cation injecting path to the RS layer can be well modulated by structure-defective graphene, leading to control of the CF quantity and size. By graphene defect engineering, a low operating current (≈1 µA) memory and a high driving current (≈1 mA) selector are successfully realized in the same material system. Based on systematically materials analysis, the diameter of CF, modulated by graphene defect size, is the major factor for CF stability. Breakthrough in addressing the current-retention dilemma will instruct the future implementation of high-density 3D integration of RS memory immune to crosstalk issues.

Negative differential resistance effect induced by metal ion implantation in SiO2 film for multilevel RRAM application.

Pt/SiO2:metal nanoparticles/Pt sandwich structure is fabricated with the method of metal ion (Ag) implantation. The device exhibits multilevel storage with appropriate R off/R on ratio, good endurance and retention properties. Based on transmission electron microscopy and energy dispersive spectrometer analysis, we confirm that Pt nanoparticles are spurted into SiO2 film from Pt bottom electrode by Ag implantation; during electroforming, the local electric field can be enhanced by these Pt nanoparticles, meanwhile the Ag nanoparticles constantly migrate toward the Pt nanoparticles. The implantation induced nanoparticles act as trap sites in the resistive switching layer and play critical roles in the multilevel storage, which is evidenced by the negative differential resistance effect in the current-voltage (I-V) measurements.

Intrinsic anionic rearrangement by extrinsic control: transition of RS and CRS in thermally elevated TiN/HfO2/Pt RRAM.

The sneak path problem is one of the major hindrances to the application of high-density crossbar resistive random access memory; however, complementary resistive switching (CRS) is an effective solution to this problem. The co-existence of resistive switching (RS) and CRS is possible within the same device. Therefore, a precise control is highly required for the successful utilization of different modes. In this study, we have demonstrated an effective way to control both switching modes in a simple HfO2-based crossbar device. The interchange between RS and CRS modes is possible, based on the intrinsic anionic rearrangement by controlling the extrinsic stimulation, either in the form of voltage or in the form of current. In particular, a highly nonlinear CRS mode is reported, in which the nonlinearity is almost 100 times greater than in the RS mode, which is achieved at a high temperature of 150 °C. The procedure reported in this study may be useful for the other resistive memory systems.

Investigation on the Conductive Filament Growth Dynamics in Resistive Switching Memory via a Universal Monte Carlo Simulator.

In resistive random access memories, modeling conductive filament growing dynamics is important to understand the switching mechanism and variability. In this paper, a universal Monte Carlo simulator is developed based on a cell switching model and a tunneling-based transport model. Driven by external electric field, the growing process of the nanoscale filament occurring in the gap region is actually dominated by cells' conductive/insulating switching, modeled through a phenomenological physics-based probability function. The electric transport through the partially formed CF is considered as current tunneling in the framework of the Quantum Point Contact model, and the potential barrier is modulated during cells' evolution. To demonstrate the validity and universality of our simulator, various operation schemes are simulated, with the simulated I - V characteristics well explaining experimental observations. Furthermore, the statistical analyses of simulation results in terms of Weibull distribution and conductance evolution also nicely track previous experimental results. Representing a simulation scale that links atomic-scale simulations to compact modeling, our simulator has the advantage of being much faster comparing with other atomic-scale models. Meanwhile, our simulator shows good universality since it can be applied to various operation signals, and also to different electrodes and dielectric layers dominated by different switching mechanisms.

Electronic imitation of behavioral and psychological synaptic activities using TiOx/Al2O3-based memristor devices.

Seeking an effective electronic synapse to emulate biological synaptic behavior is fundamental for building brain-inspired computers. An emerging two-terminal memristor, in which the conductance can be gradually modulated by external electrical stimuli, is widely considered as the strongest competitor of the electronic synapse. Here, we show the capability of TiOx/Al2O3-based memristor devices to imitate synaptic behaviors. Along with analog resistive switching performances, the devices replicate the bio-synapse behaviors of potentiation/depression, short-term-plasticity, and long-term-potentiation, which show that TiOx/Al2O3-based memristors may be useful as electronic synapses. The essential memorizing capabilities of the brain are dependent on the connection strength between neurons, and the memory types change from short-term memory to long-term memory. In the TiOx/Al2O3-based electronic synaptic junction, the memorizing levels can change their state via a standard rehearsal process and also via newly introduced process called "impact of event" i.e. the impact of pulse amplitude, and the width of the input pulse. The devices show a short-term to long-term memory effect with the introduction of intermediate mezzanine memory. The experimental achievements using the TiOx/Al2O3 electronic synapses are finally psychologically modeled by considering the mezzanine level. It is highly recommended that similar phenomena should be investigated for other memristor systems to check the authenticity of this model.

Resistive Switching Performance Improvement via Modulating Nanoscale Conductive Filament, Involving the Application of Two-Dimensional Layered Materials.

Reversible chemical and structural changes induced by ionic motion and reaction in response to electrical stimuli leads to resistive switching effects in metal-insulator-metal structures. Filamentary switching based on the formation and rupture of nanoscale conductive filament has been applied in non-volatile memory and volatile selector devices with low power consumption and fast switching speeds. Before the mass production of resistive switching devices, great efforts are still required to enable stable and reliable switching performances. The conductive filament, a bridge of microscopic metal-insulator-metal structure and macroscopic resistance states, plays an irreplaceable part in resistive switching behavior, as unreliable performance often originates from unstable filament behavior. In this Review, departing from the filamentary switching mechanism and the existing issues, recent advances of the switching performance improvement through the conductive filament modulation are discussed, in the sequence of material modulation, device structure design and switching operation scheme optimization. In particular, two-dimensional (2D) nanomaterials with excellent properties including and beyond graphene, are discussed with emphasis on performance improvement by their active roles as the switching layer, insertion layer, thin electrode, patterned electrode, and edge electrode, etc.

Anisotropic Magnetoresistance of Nano-conductive Filament in Co/HfO2/Pt Resistive Switching Memory.

Conductive bridge random access memory (CBRAM) has been extensively studied as a next-generation non-volatile memory. The conductive filament (CF) shows rich physical effects such as conductance quantization and magnetic effect. But so far, the study of filaments is not very sufficient. In this work, Co/HfO2/Pt CBRAM device with magnetic CF was designed and fabricated. By electrical manipulation with a partial-RESET method, we controlled the size of ferromagnetic metal filament. The resistance-temperature characteristics of the ON-state after various partial-RESET behaviors have been studied. Using two kinds of magnetic measurement methods, we measured the anisotropic magnetoresistance (AMR) of the CF at different temperatures to reflect the magnetic structure characteristics. By rotating the direction of the magnetic field and by sweeping the magnitude, we obtained the spatial direction as well as the easy-axis of the CF. The results indicate that the easy-axis of the CF is along the direction perpendicular to the top electrode plane. The maximum magnetoresistance was found to appear when the angle between the direction of magnetic field and that of the electric current in the CF is about 30°, and this angle varies slightly with temperature, indicating that the current is tilted.

Self-Rectifying Resistive Switching Memory with Ultralow Switching Current in Pt/Ta2O5/HfO2-x /Hf Stack.

In this study, we present a bilayer resistive switching memory device with Pt/Ta2O5/HfO2-x /Hf structure, which shows sub-1 µA ultralow operating current, median switching voltage, adequate ON/OFF ratio, and simultaneously containing excellent self-rectifying characteristics. The control sample with single HfO2-x structure shows bidirectional memory switching properties with symmetrical I-V curve in low resistance state. After introducing a 28-nm-thick Ta2O5 layer on HfO2-x layer, self-rectifying phenomena appeared, with a maximum self-rectifying ratio (RR) of ~4 × 103 observed at ±0.5 V. Apart from being a series resistance for the cell, the Ta2O5 rectifying layer also served as an oxygen reservoir which remains intact during the whole switching cycle.

Confining Cation Injection to Enhance CBRAM Performance by Nanopore Graphene Layer.

Conductive-bridge random access memory (CBRAM) is considered a strong contender of the next-generation nonvolatile memory technology. Resistive switching (RS) behavior in CBRAM is decided by the formation/dissolution of nanoscale conductive filament (CF) inside RS layer based on the cation injection from active electrode and their electrochemical reactions. Remarkably, RS is actually a localized behavior, however, cation injects from the whole area of active electrode into RS layer supplying excessive cation beyond the requirement of CF formation, leading to deterioration of device uniformity and reliability. Here, an effective method is proposed to localize cation injection into RS layer through the nanohole of inserted ion barrier between active electrode and RS layer. Taking an impermeable monolayer graphene as ion barrier, conductive atomic force microscopy results directly confirm that CF formation is confined through the nanohole of graphene due to the localized cation injection. Compared with the typical Cu/HfO2 /Pt CBRAM device, the novel Cu/nanohole-graphene/HfO2 /Pt device shows improvement of uniformity, endurance, and retention characteristics, because the cation injection is limited by the nanohole graphene. Scaling the nanohole of ion barrier down to several nanometers, the single-CF-based CBRAM device with high performance is expected to achieve by confining the cation injection at the atomic scale.

Variability Improvement of TiO x /Al2O3 Bilayer Nonvolatile Resistive Switching Devices by Interfacial Band Engineering with an Ultrathin Al2O3 Dielectric Material.

Variability control over the resistive switching process is one of the key requirements to improve the performance stability of the resistive random access memory (RRAM) devices. In this study, we show the improvement of the variability of the resistive switching operation in the TiO x /Al2O3 bilayer RRAM devices. The achievement is based on the thickness engineering of the Al2O3 layer. A thick Al2O3 dielectric actively takes part to control the resistive switching behavior; on the contrary, the ultrathin layer of Al2O3 behaves as the tunnel barrier in the structure. At lower voltage, the low resistance state conductions follow the trap-assisted tunneling and Fowler-Nordheim tunneling for the thick and thin Al2O3 RRAMs, respectively. Finally, the variation control in device forming, SET voltage distribution, high resistance state, low resistance state, and resistance ratio is achieved with the TiO x /Al2O3 bilayer RRAM devices by interfacial band engineering with an ultrathin Al2O3 dielectric material.

Eliminating Negative-SET Behavior by Suppressing Nanofilament Overgrowth in Cation-Based Memory.

Negative-SET behavior is observed in various cation-based memories, which degrades the device reliability. Transmission electron microscopy results demonstrate the behavior is caused by the overgrowth of the conductive filament (CF) into the Pt electrode. The CF overgrowth phenomenon is suppressed and the negative-SET behavior is eliminated by inserting an impermeable graphene layer. The graphene-based devices show high reliability and satisfying performance.