RESUMO
The large area wire grid polarizers (LA-WGPs) with 50 nm half-pitch were fabricated using ArF immersion lithography overcoming the limit of the shot field size. To realize the 50 nm line and space patterns on a 300 mm wafer, a zero-distance stitching process that connects the shot fields is suggested. To compensate for mutual interference between the shot fields which is called the local flare effect (LFE), the shot field arrangement is changed with optical proximity correction (OPC). Using a master wafer produced by the suggested method, 300 mm large-area WGPs were fabricated by the nano-imprint process. The WGPs have more than 80% transmittance in the visible light region, and the possibility of performance improvement can be confirmed depending on the number and method of the etch process.
RESUMO
A flexible Si complementary metal-oxide-semiconductor (CMOS) integrated circuit (IC) with multi-level interconnects is realized by thinning down and transferring the CMOS IC onto a polymer substrate. A detailed mechanical and electrical reliability analysis of the flexible Si CMOS IC is carried out in relation to the neutral mechanical plane (NMP) that is extracted from both analytical and numerical modeling. To enhance the reliability by optimizing the NMP position, the thicknesses of all the layers in the CMOS IC on the polymer substrate are carefully adjusted. The NMP-optimized flexible Si CMOS IC maintains its mechanical and electrical stability even at a 5-mm radius bending condition. In addition, to explore the degradation mechanism of the flexible Si CMOS IC, the change of the interface state density of the flexible Si CMOS at different bending conditions is investigated using the charge pumping method. Finally, the long-term electrical reliability of this flexible Si CMOS IC is also investigated.
RESUMO
Nanoelectromechanical (NEM) switches have received widespread attention as promising candidates in the drive to surmount the physical limitations currently faced by complementary metal oxide semiconductor technology. The NEM switch has demonstrated superior characteristics including quasi-zero leakage behaviour, excellent density capability and operation in harsh environments. However, an unacceptably high operating voltage (4-20 V) has posed a major obstacle in the practical use of the NEM switch in low-power integrated circuits. To utilize the NEM switch widely as a core device component in ultralow power applications, the operation voltage needs to be reduced to 1 V or below. However, sub-1 V actuation has not yet been demonstrated because of fabrication difficulties and irreversible switching failure caused by surface adhesion. Here, we report the sub-1 V operation of a NEM switch through the introduction of a novel pipe clip device structure and an effective air gap fabrication technique. This achievement is primarily attributed to the incorporation of a 4-nm-thick air gap, which is the smallest reported so far for a NEM switch generated using a 'top-down' approach. Our structure and process can potentially be utilized in various nanogap-related applications, including NEM switch-based ultralow-power integrated circuits, NEM resonators, nanogap electrodes for scientific research and sensors.