Combining Optimization and Simulation for Next-Generation Off-Road Vehicle E/E Architectural Design.

The automotive industry, with particular reference to the off-road sector, is facing several challenges, including the integration of Advanced Driver Assistance Systems (ADASs), the introduction of autonomous driving capabilities, and system-specific requirements that are different from the traditional car market. Current vehicular electrical-electronic (E/E) architectures are unable to support the amount of data for new vehicle functionalities, requiring the transition to zonal architectures, new communication standards, and the adoption of Drive-by-Wire technologies. In this work, we propose an automated methodology for next-generation off-road vehicle E/E architectural design. Starting from the regulatory requirements, we use a MILP-based optimizer to find candidate solutions, a discrete event simulator to validate their feasibility, and an ascent-based gradient method to reformulate the constraints for the optimizer in order to converge to the final architectural solution. We evaluate the results in terms of latency, jitter, and network load, as well as provide a Pareto analysis that includes power consumption, cost, and system weight.

HDR vision sensor with neuro-memristive skin detection for edge computing.

Human skin classification is an essential task for several machine vision applications such as human-machine interfaces, people/object tracking, and classification. In this paper, we describe a hybrid CMOS/memristor vision sensor architecture embedding skin detection over a wide dynamic range. In-sensor RGB to r g-chromaticity color-space conversion is executed on-the-fly through a pixel-level automatic exposure time control. Each pixel of the array delivers two pre-filtered analog signals, the r and g values, suitable for being efficiently classified as skin or non-skin through an analog memristive neural network (NN), without the need for any further signal processing. Moreover, we study the NN performance and theorize how it should be added in the hardware. The skin classifier is organized in an array of column-level memristor-based NN to exploit the nano-scale device characteristics and non-volatile analog memory capabilities, making the proposed sensor architecture highly flexible, customizable for various use-case scenarios, and low-power. The output is a skin bitmap that is robust against variations of the illuminant color and intensity.

Quantization-Aware NN Layers with High-throughput FPGA Implementation for Edge AI.

Over the past few years, several applications have been extensively exploiting the advantages of deep learning, in particular when using convolutional neural networks (CNNs). The intrinsic flexibility of such models makes them widely adopted in a variety of practical applications, from medical to industrial. In this latter scenario, however, using consumer Personal Computer (PC) hardware is not always suitable for the potential harsh conditions of the working environment and the strict timing that industrial applications typically have. Therefore, the design of custom FPGA (Field Programmable Gate Array) solutions for network inference is gaining massive attention from researchers and companies as well. In this paper, we propose a family of network architectures composed of three kinds of custom layers working with integer arithmetic with a customizable precision (down to just two bits). Such layers are designed to be effectively trained on classical GPUs (Graphics Processing Units) and then synthesized to FPGA hardware for real-time inference. The idea is to provide a trainable quantization layer, called Requantizer, acting both as a non-linear activation for neurons and a value rescaler to match the desired bit precision. This way, the training is not only quantization-aware, but also capable of estimating the optimal scaling coefficients to accommodate both the non-linear nature of the activations and the constraints imposed by the limited precision. In the experimental section, we test the performance of this kind of model while working both on classical PC hardware and a case-study implementation of a signal peak detection device running on a real FPGA. We employ TensorFlow Lite for training and comparison, and use Xilinx FPGAs and Vivado for synthesis and implementation. The results show an accuracy of the quantized networks close to the floating point version, without the need for representative data for calibration as in other approaches, and performance that is better than dedicated peak detection algorithms. The FPGA implementation is able to run in real time at a rate of four gigapixels per second with moderate hardware resources, while achieving a sustained efficiency of 0.5 TOPS/W (tera operations per second per watt), in line with custom integrated hardware accelerators.

Self-Powered WSN for Distributed Data Center Monitoring.

Monitoring environmental parameters in data centers is gathering nowadays increasing attention from industry, due to the need of high energy efficiency of cloud services. We present the design and the characterization of an energy neutral embedded wireless system, prototyped to monitor perpetually environmental parameters in servers and racks. It is powered by an energy harvesting module based on Thermoelectric Generators, which converts the heat dissipation from the servers. Starting from the empirical characterization of the energy harvester, we present a power conditioning circuit optimized for the specific application. The whole system has been enhanced with several sensors. An ultra-low-power micro-controller stacked over the energy harvesting provides an efficient power management. Performance have been assessed and compared with the analytical model for validation.