Fabrication of arrayed Si nanowire-based nano-floating gate memory devices on flexible plastics.

Arrayed Si nanowire (NW)-based nano-floating gate memory (NFGM) devices with Pt nanoparticles (NPs) embedded in Al2O3 gate layers are successfully constructed on flexible plastics by top-down approaches. Ten arrayed Si NW-based NFGM devices are positioned on the first level. Cross-linked poly-4-vinylphenol (PVP) layers are spin-coated on them as isolation layers between the first and second level, and another ten devices are stacked on the cross-linked PVP isolation layers. The electrical characteristics of the representative Si NW-based NFGM devices on the first and second levels exhibit threshold voltage shifts, indicating the trapping and detrapping of electrons in their NPs nodes. They have an average threshold voltage shift of 2.5 V with good retention times of more than 5 x 10(4) s. Moreover, most of the devices successfully retain their electrical characteristics after about one thousand bending cycles. These well-arrayed and stacked Si NW-based NFGM devices demonstrate the potential of nanowire-based devices for large-scale integration.

Flexible logic gates composed of high performance GaAs-nanowire-based MESFETs with MHz-dynamic operations.

High performance NOT, NAND and NOR logic gates composed of GaAs-nanowire (NW)-based metal-semiconductor field-effect transistors (MESFETs) were constructed on flexible plastics through a noble top-down route. The representative GaAs-NW-based MESFETs exhibited superior electrical characteristics such as a high mobility (∼3300 cm(2) V(-) s(-1)), large I(on)/I(off) ratio (∼10(8)) and small subthreshold swing (∼70 mV/dec). The NOT, NAND and NOR logic gates showed a maximum voltage gain of 108 and logic swings of 97-99%. All of the logic gates successfully retained their electrical characteristics during 2000 bending cycles. Furthermore, the logic gates were well operated by square-wave signals of up to 100 MHz under various strain conditions. The high performances demonstrated in this study open the way to the realization of high speed flexible logic devices.

ZnO nanowire-based nonvolatile memory devices with Al2O3 layers as storage nodes.

Top-gate ZnO nanowire field-effect transistors (FETs) with Al2O3 gate dielectric layers as storage nodes were fabricated and their memory effects were characterized in this work. The Al2O3 layers deposited on the ZnO nanowire channels were utilized not only as gate dielectric ones but also as charge trapping ones. For a representative top-gate ZnO nanowire FET, its I(DS)-V(GS) characteristics for the double sweep of the gate voltages exhibit the counterclockwise hysteresis and the threshold voltage shift. The gate voltage in the pulse form was applied for 1 s, and the threshold voltage shift of I(DS)-V(GS) characteristics was extended from 0.3 to 0.8 V compared with that for the double sweep. In this ZnO nanowire FET, negative charge carriers originated from the gate electrode are stored in the Al2O3 layer for applied negative gate voltages, and they are extracted for applied positive gate voltages.

ZnO nanowire field-effect transistors with floating gate nodes of Au nanoparticles.

The memory characteristics of top-gate single ZnO nanowire-based field-effect transistors (FETs) with floating gate nodes consisting of Au nanoparticles on top of the nanowire channels were investigated in this study. Au nanoparticles, synthesized by a thermal deposition of Au thin film and by a subsequent thermal annealing procedure, were embedded in between Al2O3 tunneling and control gate layers deposited on ZnO nanowire channels. For a representative single ZnO nanowire-based FET with floating gate nodes consisting of Au nanoparticles embedded between Al2O3 layers, its drain current versus gate voltage (I(DS)-V(DS)) characteristics for a double sweep in the gate voltage range from -4 to 4 V exhibit a clockwise hysteresis loop with a threshold voltage shift of deltaV(th) = 1.6 V, resulting from the tunneling of the charge carriers from the ZnO nanowire channel into the Au nanoparticles. In addition, the charge storage characteristic of threshold voltage shift with the elapsed time observed in this FET is also discussed in this paper.

Optical waveguiding of the nanowire/quantum dot hybrid system.

We present the results of optical waveguiding of nanowires/quantum dots hybrid systems which were made by depositing CdTe quantum dots (QDs) on ZnO nanowires (NWs). We used a laser confocal/atomic force combined microscope to image the QD photoluminescence caused by the light propagation along the NW/QD hybrid systems, and the nanoscale topographic images of the samples. The propagation lengths of the samples were estimated and shown to be consistent with measured thickness of the samples.

NOT and NAND logic circuits composed of top-gate ZnO nanowire field-effect transistors with high-k Al(2)O(3) gate layers.

Electrical characteristics of NOT and NAND logic circuits fabricated using top-gate ZnO nanowire field-effect transistors (FETs) with high-k Al(2)O(3) gate layers were investigated in this study. To form a NOT logic circuit, two identical FETs whose I(on)/I(off) ratios were as high as ∼10(8) were connected in series in a single ZnO nanowire channel, sharing a common source electrode. Its voltage transfer characteristics exhibited an inverting operation and its logic swing was 98%. In addition, the characteristics of a NAND logic circuit composed of three top-gate FETs connected in series in a single nanowire channel are discussed in this paper.

ZnO nanowire-based nano-floating gate memory with Pt nanocrystals embedded in Al(2)O(3) gate oxides.

The memory characteristics of ZnO nanowire-based nano-floating gate memory (NFGM) with Pt nanocrystals acting as the floating gate nodes were investigated in this work. Pt nanocrystals were embedded between Al(2)O(3) tunneling and control oxide layers deposited on ZnO nanowire channels. For a representative ZnO nanowire-based NFGM with embedded Pt nanocrystals, a threshold voltage shift of 3.8 V was observed in its drain current versus gate voltage (I(DS)-V(GS)) measurements for a double sweep of the gate voltage, revealing that the deep effective potential wells built into the nanocrystals provide our NFGM with a large charge storage capacity. Details of the charge storage effect observed in this memory device are discussed in this paper.