Spike-Based Neuromorphic Hardware for Dynamic Tactile Perception with a Self-Powered Mechanoreceptor Array.

A self-powered mechanoreceptor array is demonstrated using four mechanoreceptor cells for recognition of dynamic touch gestures. Each cell consists of a triboelectric nanogenerator (TENG) for touch sensing and a bi-stable resistor (biristor) for spike encoding. It produces informative spike signals by sensing a force of an external touch and encoding the force into the number of spikes. An array of the mechanoreceptor cells is utilized to monitor various touch gestures and it successfully generated spike signals corresponding to all the gestures. To validate the practicality of the mechanoreceptor array, a spiking neural network (SNN), highly attractive for power consumption compared to the conventional von Neumann architecture, is used for the identification of touch gestures. The measured spiking signals are reflected as inputs for the SNN simulations. Consequently, touch gestures are classified with a high accuracy rate of 92.5%. The proposed mechanoreceptor array emerges as a promising candidate for a building block of tactile in-sensor computing in the era of the Internet of Things (IoT), due to the low cost and high manufacturability of the TENG. This eliminates the need for a power supply, coupled with the intrinsic high throughput of the Si-based biristor employing complementary metal-oxide-semiconductor (CMOS) technology.

Bio-Inspired Organic Synaptor with In Situ Ion-Doped Ultrathin Polyelectrolyte Containing Acetylcholine-Like Cation.

An ion-based synaptic transistor (synaptor) is designed to emulate a biological synapse using controlled ion movements. However, developing a solid-state electrolyte that can facilitate ion movement while achieving large-scale integration remains challenging. Here, a bio-inspired organic synaptor (BioSyn) with an in situ ion-doped polyelectrolyte (i-IDOPE) is demonstrated. At the molecular scale, a polyelectrolyte containing the tert-amine cation, inspired by the neurotransmitter acetylcholine is synthesized using initiated chemical vapor deposition (iCVD) with in situ doping, a one-step vapor-phase deposition used to fabricate solid-state electrolytes. This method results in an ultrathin, but highly uniform and conformal solid-state electrolyte layer compatible with large-scale integration, a form that is not previously attainable. At a synapse scale, synapse functionality is replicated, including short-term and long-term synaptic plasticity (STSP and LTSP), along with a transformation from STSP to LTSP regulated by pre-synaptic voltage spikes. On a system scale, a reflex in a peripheral nervous system is mimicked by mounting the BioSyns on various substrates such as rigid glass, flexible polyethylene naphthalate, and stretchable poly(styrene-ethylene-butylene-styrene) for a decentralized processing unit. Finally, a classification accuracy of 90.6% is achieved through semi-empirical simulations of MNIST pattern recognition, incorporating the measured LTSP characteristics from the BioSyns.

A Nanoscale Bistable Resistor for an Oscillatory Neural Network.

Coupled oscillators construct an oscillatory neural network (ONN) by mimicking the interactions among neurons in the human brain. This work demonstrates a fully CMOS-based oscillator consisting of a bistable resistor (biristor), which shares a structure identical with that of a metal-oxide-semiconductor field-effect transistor, except for the use of a gate electrode. The biristor-based oscillator (birillator) generates oscillating voltage signals in the form of spikes due to a single transistor latch phenomenon. When two birillators are connected with a coupling capacitor, they become synchronized with a phase difference of 180°. These coupled oscillation characteristics are experimentally investigated for an ONN. As practical applications of the ONN with coupled birillators, edge detection and vertex coloring are conducted by encoding information into phase differences between them. The proposed fully CMOS-based birillators are advantageous for low power consumption, high CMOS compatibility, and a compact footprint area.

Vertically Integrated CMOS Ternary Logic Device with Low Static Power Consumption and High Packing Density.

A ternary logic system to realize the simplest multivalued logic architecture can enhance energy efficiency compared to a binary logic system by reducing the number of transistors and interconnections. For the ternary logic system, a ternary logic device to harness three stable states is needed. In this study, a vertically integrated complementary metal-oxide-semiconductor ternary logic device is demonstrated by monolithically integrating a thin-film transistor (TFT) over a transistor-based threshold switch (TTS). Because the TFT and the TTS have their own source (S), drain (D), and gate (G), there are physically six electrodes. But the hybrid ternary logic device of the TFT over the TTS has only four electrodes: S, D, GTFT, and GTTS like a single MOSFET. It is because the D of the underlying TTS is electrically tied with the S of the superjacent TFT. By combining an on- and off-state of the TFT and the TTS, ternary logic values of low current ("0"-state), middle current ("1"-state), and high current ("2"-state) are realized. Particularly, static power consumption at the "1"-state is decreased by employing the TTS with low off-state leakage current compared to previously reported other ternary logic devices. In addition, a footprint of the ternary logic device with the vertically overlaying structure that has a framework of "one over the other" can be lowered by roughly twice compared to that with the laterally deployed structure that has an organization of "one alongside the other".

3D Neuromorphic Hardware with Single Thin-Film Transistor Synapses Over Single Thin-Body Transistor Neurons by Monolithic Vertical Integration.

Neuromorphic hardware with a spiking neural network (SNN) can significantly enhance the energy efficiency for artificial intelligence (AI) functions owing to its event-driven and spatiotemporally sparse operations. However, an artificial neuron and synapse based on complex complementary metal-oxide-semiconductor (CMOS) circuits limit the scalability and energy efficiency of neuromorphic hardware. In this work, a neuromorphic module is demonstrated composed of synapses over neurons realized by monolithic vertical integration. The synapse at top is a single thin-film transistor (1TFT-synapse) made of poly-crystalline silicon film and the neuron at bottom is another single transistor (1T-neuron) made of single-crystalline silicon. Excimer laser annealing (ELA) is applied to activate dopants for the 1TFT-synapse at the top and rapid thermal annealing (RTA) is applied to do so for the 1T-neuron at the bottom. Internal electro-thermal annealing (ETA) via the generation of Joule heat is also used to enhance the endurance of the 1TFT-synapse without transferring heat to the 1T-neuron at the bottom. As neuromorphic vision sensing, classification of American Sign Language (ASL) is conducted with the fabricated neuromorphic module. Its classification accuracy on ASL is ≈92.3% even after 204 800 update pulses.

Leaky FinFET for Reservoir Computing with Temporal Signal Processing.

Reservoir computing can greatly reduce the hardware and training costs of recurrent neural networks with temporal data processing. To implement reservoir computing in a hardware form, physical reservoirs transforming sequential inputs into a high-dimensional feature space are necessary. In this work, a physical reservoir with a leaky fin-shaped field-effect transistor (L-FinFET) is demonstrated by the positive use of a short-term memory property arising from the absence of an energy barrier to suppress the tunneling current. Nevertheless, the L-FinFET reservoir does not lose its multiple memory states. The L-FinFET reservoir consumes very low power when encoding temporal inputs because the gate serves as an enabler of the write operation, even in the off-state, due to its physical insulation from the channel. In addition, the small footprint area arising from the scalability of the FinFET due to its multiple-gate structure is advantageous for reducing the chip size. After the experimental proof of 4-bit reservoir operations with 16 states for temporal signal processing, handwritten digits in the Modified National Institute of Standards and Technology dataset are classified by reservoir computing.

Artificial Multisensory Neuron with a Single Transistor for Multimodal Perception through Hybrid Visual and Thermal Sensing.

An artificial multisensory device applicable to in-sensor computing is demonstrated with a single-transistor neuron (1T-neuron) for multimodal perception. It simultaneously receives two sensing signals from visual and thermal stimuli. The 1T-neuron transforms these signals into electrical signals in the form of spiking and then fires them for a spiking neural network at the same time. This feature makes it feasible to realize input neurons for multimodal sensing. Visual and thermal sensing is achieved due to the inherent optical and thermal behaviors of the 1T-neuron. To demonstrate a neuromorphic multimodal sensing system with the artificial multisensory 1T-neuron, fingerprint recognition, widely used for biometric security, is implemented. Owing to the simultaneous sensing of heat as well as light, the proposed fingerprint recognition system composed of multisensory 1T-neurons not only identifies a genuine pattern but also judges whether or not it is forged.