High-Density Artificial Synapse Array Consisting of Homogeneous Electrolyte-Gated Transistors.

The artificial synapse array with an electrolyte-gated transistor (EGT) as an array unit presents considerable potential for neuromorphic computation. However, the integration of EGTs faces the drawback of the conflict between the polymer electrolytes and photo-lithography. This study presents a scheme based on a lateral-gate structure to realize high-density integration of EGTs and proposes the integration of 100 × 100 EGTs into a 2.5 × 2.5 cm2 glass, with a unit density of up to 1600 devices cm-2 . Furthermore, an electrolyte framework is developed to enhance the array performance, with ionic conductivity of up to 2.87 × 10-3  S cm-1 owing to the porosity of zeolitic imidazolate frameworks-67. The artificial synapse array realizes image processing functions, and exhibits high performance and homogeneity. The handwriting recognition accuracy of a representative device reaches 92.80%, with the standard deviation of all the devices being limited to 9.69%. The integrated array and its high performance demonstrate the feasibility of the scheme and provide a solid reference for the integration of EGTs.

Weighted-Sum Operation of Three-Terminal Synapse Transistors in Array Configuration Using Spin-Coated Li-Doped ZrO2 Electrolyte Gate Insulator.

Artificial synapses with ideal functionalities are essential in hardware neural networks to allow for energy-efficient analog computing. Electrolyte-gated transistors (EGTs) are promising candidates for artificial synaptic devices due to their low voltage operations supported by large specific capacitances of electrolyte gate insulators (EGIs). We investigated the synapse transistor employing an In-Ga-Zn-O channel and a Li-doped ZrO2 (LZO) EGI so as to improve the short-term plasticity (STP) and long-term potentiation (LTP). The LZO EGIs showed distinct differences in characteristics depending on the Li doping concentration, and we adopted the optimum doping concentration of 10%. Based on the strong electric double layer effect secured from the LZO, we successfully demonstrated excellent synaptic operations with gradual modulations of excitatory synaptic plasticity with variations in amplitude, width, and number of applied pulse spikes. The introduction of the LZO EGI was verified to improve typical short-term plasticity such as paired-pulse facilitation. Furthermore, by minutely controlling the pulse spike conditions, the conversion to LTP from STP was clearly accomplished while implementing the anti-Hebbian spike timing-dependent plasticity. Finally, the array configuration of synaptic devices, which is essential for realizing neuromorphic computing, was also demonstrated. In a 3 × 3 array architecture, the weighted-sum operation was well emulated to assign multilevels in seven states with the pulse width modulation scheme.

3D AND-Type Stacked Array for Neuromorphic Systems.

NOR/AND flash memory was studied in neuromorphic systems to perform vector-by-matrix multiplication (VMM) by summing the current. Because the size of NOR/AND cells exceeds those of other memristor synaptic devices, we proposed a 3D AND-type stacked array to reduce the cell size. Through a tilted implantation method, the conformal sources and drains of each cell could be formed, with confirmation by a technology computer aided design (TCAD) simulation. In addition, the cell-to-cell variation due to the etch slope could be eliminated by controlling the deposition thickness of the cells. The suggested array can be beneficial in simple program/inhibit schemes given its use of Fowler-Nordheim (FN) tunneling because the drain lines and source lines are parallel. Therefore, the conductance of each synaptic device can be updated at low power level.

Gate-Tunable Synaptic Dynamics of Ferroelectric-Coupled Carbon-Nanotube Transistors.

Artificial neural networks (ANNs) based on synaptic devices, which can simultaneously perform processing and storage of data, have superior computing performance compared to conventional von Neumann architectures. Here, we present a ferroelectric coupled artificial synaptic device with reliable weight update and storage properties for ANNs. The artificial synaptic device, which is based on a ferroelectric polymer capacitively coupled with an oxide dielectric via an electric-field-permeable, semiconducting single-walled carbon-nanotube channel, is successfully fabricated by inkjet printing. By controlling the ferroelectric polarization, synaptic dynamics, such as excitatory and inhibitory postsynaptic currents and long-term potentiation/depression characteristics, is successfully implemented in the artificial synaptic device. Furthermore, the constructed ANN, which is designed in consideration of the device-to-device variation within the synaptic array, efficiently executes the tasks of learning and recognition of the Modified National Institute of Standards and Technology numerical patterns.