3D-integrated multilayered physical reservoir array for learning and forecasting time-series information.

A wide reservoir computing system is an advanced architecture composed of multiple reservoir layers in parallel, which enables more complex and diverse internal dynamics for multiple time-series information processing. However, its hardware implementation has not yet been realized due to the lack of a high-performance physical reservoir and the complexity of fabricating multiple stacks. Here, we achieve a proof-of-principle demonstration of such hardware made of a multilayered three-dimensional stacked 3 × 10 × 10 tungsten oxide memristive crossbar array, with which we further realize a wide physical reservoir computing for efficient learning and forecasting of multiple time-series data. Because a three-layer structure allows the seamless and effective extraction of intricate three-dimensional local features produced by various temporal inputs, it can readily outperform two-dimensional based approaches extensively studied previously. Our demonstration paves the way for wide physical reservoir computing systems capable of efficiently processing multiple dynamic time-series information.

High-Reliability and Self-Rectifying Alkali Ion Memristor through Bottom Electrode Design and Dopant Incorporation.

Ionic memristor devices are crucial for efficient artificial neural network computations in neuromorphic hardware. They excel in multi-bit implementation but face challenges like device reliability and sneak currents in crossbar array architecture (CAA). Interface-type ionic memristors offer low variation, self-rectification, and no forming process, making them suitable for CAA. However, they suffer from slow weight updates and poor retention and endurance. To address these issues, the study demonstrated an alkali ion self-rectifying memristor with an alkali metal reservoir formed by a bottom electrode design. By adopting Li metal as the adhesion layer of the bottom electrode, an alkali ion reservoir was formed at the bottom of the memristor layer by diffusion occurring during the atomic layer deposition process for the Na:TiO2 memristor layer. In addition, Al dopant was used to improve the retention characteristics by suppressing the diffusion of alkali cations. In the memristor device with optimized Al doping, retention characteristics of more than 20 h at 125 °C, endurance characteristics of more than 5.5 × 105, and high linearity/symmetry of weight update characteristics were achieved. In reliability tests on 100 randomly selected devices from a 32 × 32 CAA device, device-to-device and cycle-to-cycle variations showed low variation values within 81% and 8%, respectively.

Programming memristor arrays with arbitrarily high precision for analog computing.

In-memory computing represents an effective method for modeling complex physical systems that are typically challenging for conventional computing architectures but has been hindered by issues such as reading noise and writing variability that restrict scalability, accuracy, and precision in high-performance computations. We propose and demonstrate a circuit architecture and programming protocol that converts the analog computing result to digital at the last step and enables low-precision analog devices to perform high-precision computing. We use a weighted sum of multiple devices to represent one number, in which subsequently programmed devices are used to compensate for preceding programming errors. With a memristor system-on-chip, we experimentally demonstrate high-precision solutions for multiple scientific computing tasks while maintaining a substantial power efficiency advantage over conventional digital approaches.

Hardware implementation of memristor-based artificial neural networks.

Artificial Intelligence (AI) is currently experiencing a bloom driven by deep learning (DL) techniques, which rely on networks of connected simple computing units operating in parallel. The low communication bandwidth between memory and processing units in conventional von Neumann machines does not support the requirements of emerging applications that rely extensively on large sets of data. More recent computing paradigms, such as high parallelization and near-memory computing, help alleviate the data communication bottleneck to some extent, but paradigm- shifting concepts are required. Memristors, a novel beyond-complementary metal-oxide-semiconductor (CMOS) technology, are a promising choice for memory devices due to their unique intrinsic device-level properties, enabling both storing and computing with a small, massively-parallel footprint at low power. Theoretically, this directly translates to a major boost in energy efficiency and computational throughput, but various practical challenges remain. In this work we review the latest efforts for achieving hardware-based memristive artificial neural networks (ANNs), describing with detail the working principia of each block and the different design alternatives with their own advantages and disadvantages, as well as the tools required for accurate estimation of performance metrics. Ultimately, we aim to provide a comprehensive protocol of the materials and methods involved in memristive neural networks to those aiming to start working in this field and the experts looking for a holistic approach.

Filament-free memristors for computing.

Memristors have attracted increasing attention due to their tremendous potential to accelerate data-centric computing systems. The dynamic reconfiguration of memristive devices in response to external electrical stimuli can provide highly desirable novel functionalities for computing applications when compared with conventional complementary-metal-oxide-semiconductor (CMOS)-based devices. Those most intensively studied and extensively reviewed memristors in the literature so far have been filamentary type memristors, which typically exhibit a relatively large variability from device to device and from switching cycle to cycle. On the other hand, filament-free switching memristors have shown a better uniformity and attractive dynamical properties, which can enable a variety of new computing paradigms but have rarely been reviewed. In this article, a wide range of filament-free switching memristors and their corresponding computing applications are reviewed. Various junction structures, switching properties, and switching principles of filament-free memristors are surveyed and discussed. Furthermore, we introduce recent advances in different computing schemes and their demonstrations based on non-filamentary memristors. This Review aims to present valuable insights and guidelines regarding the key computational primitives and implementations enabled by these filament-free switching memristors.