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The magnitude and origin of the electro-optic measurements in strained silicon devices has been lately the object of a great controversy. Furthermore, recent works underline the importance of the masking effect of free carriers in strained waveguides and the low interaction between the mode and the highly strained areas. In the present work, the use of a p-i-n junction and an asymmetric cladding is proposed to eliminate the unwanted carrier influence and improve the electro-optical modulation response. The proposed configuration enhances the effective refractive index due to the strain-induced Pockels effect in more than two orders of magnitude with respect to the usual configuration.
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In this paper, we present the design, fabrication and characterization of a carrier depletion silicon-photonic switch based on a highly doped vertical pn junction. The vertical nature of the pn junction enables the device to exhibit a modulation efficiency as high as 0.23â V.cm. Fast switching times of 60ps are achieved in a lumped configuration. Moreover, the process flow is highly tolerant to fabrication deviations allowing a seamless transfer to the 350â nm process node of a commercial complementary-metal-oxide semiconductor (CMOS) foundry. Overall, this work showcases the possibility of fabricating highly efficient carrier depletion-based silicon photonic switches using medium resolution lithography.
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The lack of memory effect of silicon makes it unfeasible to store electronic data in photonics. Here we propose a non-volatile readout photonic memory, which is electronically written/erased and optically read. The memory utilizes indium tin oxide as a floating gate and exploits its epsilon-near-zero regime and electro-optic activity. Extinction ratios greater than 10 dB in a bandwidth of 100 nm for a 5 µm long memory are obtained. Furthermore, power consumption in the order of microwatts with retention times of about a decade have been predicted. The proposed structure opens a pathway for developing highly integrated electro-optic devices such as memory banks.
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Optical switches based on tunable multimode interference (MMI) couplers can simultaneously reduce the footprint and increase the tolerance against fabrication deviations. Here, a compact 2x2 silicon switch based on a thermo-optically tunable MMI structure with a footprint of only 0.005 mm(2) is proposed and demonstrated. The MMI structure has been optimized using a silica trench acting as a thermal isolator without introducing any substantial loss penalty or crosstalk degradation. Furthermore, the electrodes performance have significantly been improved via engineering the heater geometry and using two metallization steps. Thereby, a drastic power consumption reduction of around 90% has been demonstrated yielding to values as low as 24.9 mW. Furthermore, very fast switching times of only 1.19 µs have also been achieved.
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This Letter presents a compact and low-loss 1×2 asymmetrical multimode interference (A-MMI) splitter in rib geometry for on-chip power monitoring at 1.55 µm, where a given alteration of the component cavity determines arbitrary values of the output power splitting ratios. The device shows reduced losses (â¼0.4-0.8 dB) and robustness across a 40 nm optical bandwidth (1540-1580 nm).
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We demonstrate group-index engineering in a one-dimensional periodic silicon structure consisting of a deep-etched laterally corrugated waveguide with circular holes patterned onto its wide section. Our theoretical analysis, supported by experimental results, shows that the first-order optical mode can propagate inside the Brillouin zone with a relatively high group index over a wide frequency range. Nearly constant group index as high as 13.5 over a wavelength range of approximately 14 nm is experimentally demonstrated in a 50-microm-long waveguide.
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A compact waveguide crossing structure with low transmission losses and negligible crosstalk is demonstrated for silicon-on-insulator circuits. The crossing structure is based on a mode expander optimized by means of a genetic algorithm leading to transmission losses lower than 0.2 dB and crosstalk and reflection losses below 40 dB in a broad bandwidth of 20 nm. Furthermore, the resulting crossing structure has a footprint of only 6x6 microm(2) and does not require any additional fabrication steps.
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Microwave index engineering has been investigated in order to properly design slow-wave coplanar waveguides suitable for a wide range of applications in microwave, photonics, plasmonics and metamaterials. The introduction and optimization of novel capacitive and inductive elements is proposed as a design approach to increase the microwave index while keeping the impedance close to 50 Ω to ensure the compatibility with external electronic devices. The contribution of inductive and capacitive elements and their influence on the performance of the slow-wave coplanar waveguide has been systematically analyzed. As a result, a microwave index as high as 11.6 has been experimentally demonstrated in a frequency range up to 40 GHz which is, to the best of our knowledge, the largest microwave index obtained so far in coplanar waveguides.
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Photonic integrated circuits are developing as key enabling components for high-performance computing and advanced network-on-chip, as well as other emerging technologies such as lab-on-chip sensors, with relevant applications in areas from medicine and biotechnology to aerospace. These demanding applications will require novel features, such as dynamically reconfigurable light pathways, obtained by properly harnessing on-chip optical radiation. In this paper, we introduce a broadband, high directivity (>150), low loss and reconfigurable silicon photonics nanoantenna that fully enables on-chip radiation control. We propose the use of these nanoantennas as versatile building blocks to develop wireless (unguided) silicon photonic devices, which considerably enhance the range of achievable integrated photonic functionalities. As examples of applications, we demonstrate 160 Gbit s-1 data transmission over mm-scale wireless interconnects, a compact low-crosstalk 12-port crossing and electrically reconfigurable pathways via optical beam steering. Moreover, the realization of a flow micro-cytometer for particle characterization demonstrates the smart system integration potential of our approach as lab-on-chip devices.