RESUMO
As the integration packaging density of high-power LED (Light Emitting Diode) chip modules become higher and higher, the accuracy and speed of visual inspection require higher demands correspondingly. The accurate position matching of substrates and flip-chip LEDs is one of the key technologies in the automatic eutectic welding process. In this paper we propose a method based on image features to complete the matching of the substrates and the flip-chip LEDs. Firstly, the substrate images and the flip-chip images are pre-processed respectively to obtain binary images. Then we apply Hough transformation to detect straight lines on the binary images, and find out the main linear directions to trigger the mechanical arms to adjust the positions of the substrate and the chip initially. Thirdly, we use eight neighbors interconnected domain algorithm for the first time to locate notable features of the substrate, and pass the located information to the control system to trigger the mechanical arm to adjust the substrate for the second time. At the same time, projection algorithm is applied to locate the anode of the flip-chip to drive the mechanical arm to adjust the position of the flip-chip again. Finally, the position information is used to trigger the mechanical arm to accomplish the matching of the substrate and the flip-chip. The proposed method improves the speed of matching on the basis of the accuracy of matching, which achieves these requirements of real-time and high accuracy applications.
RESUMO
Due to the rise of 5G, IoT, AI, and high-performance computing applications, datacenter traffic has grown at a compound annual growth rate of nearly 30%. Furthermore, nearly three-fourths of the datacenter traffic resides within datacenters. The conventional pluggable optics increases at a much slower rate than that of datacenter traffic. The gap between application requirements and the capability of conventional pluggable optics keeps increasing, a trend that is unsustainable. Co-packaged optics (CPO) is a disruptive approach to increasing the interconnecting bandwidth density and energy efficiency by dramatically shortening the electrical link length through advanced packaging and co-optimization of electronics and photonics. CPO is widely regarded as a promising solution for future datacenter interconnections, and silicon platform is the most promising platform for large-scale integration. Leading international companies (e.g., Intel, Broadcom and IBM) have heavily investigated in CPO technology, an inter-disciplinary research field that involves photonic devices, integrated circuits design, packaging, photonic device modeling, electronic-photonic co-simulation, applications, and standardization. This review aims to provide the readers a comprehensive overview of the state-of-the-art progress of CPO in silicon platform, identify the key challenges, and point out the potential solutions, hoping to encourage collaboration between different research fields to accelerate the development of CPO technology.
RESUMO
A novel miniaturized single-fed circularly-polarized (CP) microstrip patch antenna operating in the Industrial, Scientific, Medical (ISM) band of 2.40â»2.48 GHz, is comprehensively proposed for implantable wireless communications. By employing reactive loading in the arrow-shaped slotted patch to form slow wave effect and embedding V-shaped slots into patch to lengthen the current path, the proposed implantable antenna is minimized with the overall dimensions of 9.2 mm × 9.2 mm × 1.27 mm. The radiation patterns of the proposed antenna illustrate the performance of left-handed circular polarization. The simulated results show that an impedance bandwidth of 7.2% (2.39â»2.57 GHz) and an axial ratio bandwidth of 3.7% (2.39â»2.48 GHz) at the ISM band are achieved, respectively. Ex vivo measured results are in good agreement with the corresponding simulated ones.