On-Chip Waveguide Coupling of a Layered Semiconductor Single-Photon Source.

Fully integrated quantum technology based on photons is in the focus of current research, because of its immense potential concerning performance and scalability. Ideally, the single-photon sources, the processing units, and the photon detectors are all combined on a single chip. Impressive progress has been made for on-chip quantum circuits and on-chip single-photon detection. In contrast, nonclassical light is commonly coupled onto the photonic chip from the outside, because presently only few integrated single-photon sources exist. Here, we present waveguide-coupled single-photon emitters in the layered semiconductor gallium selenide as promising on-chip sources. GaSe crystals with a thickness below 100 nm are placed on Si3N4 rib or slot waveguides, resulting in a modified mode structure efficient for light coupling. Using optical excitation from within the Si3N4 waveguide, we find nonclassicality of generated photons routed on the photonic chip. Thus, our work provides an easy-to-implement and robust light source for integrated quantum technology.

Highly Anisotropic in-Plane Excitons in Atomically Thin and Bulklike 1T'-ReSe2.

Atomically thin materials such as graphene or MoS2 are of high in-plane symmetry. Crystals with reduced symmetry hold the promise for novel optoelectronic devices based on their anisotropy in current flow or light polarization. Here, we present polarization-resolved optical transmission and photoluminescence spectroscopy of excitons in 1T'-ReSe2. On reducing the crystal thickness from bulk to a monolayer, we observe a strong blue shift of the optical band gap from 1.37 to 1.50 eV. The excitons are strongly polarized with dipole vectors along different crystal directions, which persist from bulk down to monolayer thickness. The experimental results are well reproduced by ab initio calculations based on the GW-BSE approach within LDA+GdW approximation. The excitons have high binding energies of 860 meV for the monolayer and 120 meV for bulk. They are strongly confined within a single layer even for the bulk crystal. In addition, we find in our calculations a direct band gap in 1T'-ReSe2 regardless of crystal thickness, indicating weak interlayer coupling effects on the band gap characteristics. Our results pave the way for polarization-sensitive applications, such as optical logic circuits operating in the infrared spectral region.

Interlayer charge transfer in supported and suspended MoS2/Graphene/MoS2 vertical heterostructures.

In this letter, we report on the optical and structural properties of supported and suspended MoS2/Graphene/MoS2 vertical heterostructures using Raman and photoluminescence (PL) spectroscopies. Vertical heterostructures (VH) are formed by multiple wet transfers on micro-sized holes in SiO2/Si substrates, resulting in VH with different configurations. The strong interlayer coupling is confirmed by Raman spectroscopy. Additionally, we observe an enhancement of the PL emission in the three-layer VH (either support or suspended) compared with bare MoS2 or MoS2/Graphene. This suggests the formation of a spatial type-II band alignment assisted by the graphene layer and thus, the operation of the VH as a n++/metal/n junction.

Ratio-based multi-level resistive memory cells.

Ratio-based encoding has recently been proposed for single-level resistive memory cells, in which the resistance ratio of a pair of resistance-switching devices, rather than the resistance of a single device (i.e. resistance-based encoding), is used for encoding single-bit information, which significantly reduces the bit error probability. Generalizing this concept for multi-level cells, we propose a ratio-based information encoding mechanism and demonstrate its advantages over the resistance-based encoding for designing multi-level memory systems. We derive a closed-form expression for the bit error probability of ratio-based and resistance-based encodings as a function of the number of levels of the memory cell, the variance of the distribution of the resistive states, and the ON/OFF ratio of the resistive device, from which we prove that for a multi-level memory system using resistance-based encoding with bit error probability x, its corresponding bit error probability using ratio-based encoding will be reduced to [Formula: see text] at the best case and [Formula: see text] at the worst case. We experimentally validated these findings on multiple resistance-switching devices and show that, compared to the resistance-based encoding on the same resistive devices, our approach achieves up to 3 orders of magnitude lower bit error probability, or alternatively it could reduce the cell's programming time and programming energy by up 5-10[Formula: see text], while achieving the same bit error probability.