Programmable nanowire circuits for nanoprocessors.

A nanoprocessor constructed from intrinsically nanometre-scale building blocks is an essential component for controlling memory, nanosensors and other functions proposed for nanosystems assembled from the bottom up. Important steps towards this goal over the past fifteen years include the realization of simple logic gates with individually assembled semiconductor nanowires and carbon nanotubes, but with only 16 devices or fewer and a single function for each circuit. Recently, logic circuits also have been demonstrated that use two or three elements of a one-dimensional memristor array, although such passive devices without gain are difficult to cascade. These circuits fall short of the requirements for a scalable, multifunctional nanoprocessor owing to challenges in materials, assembly and architecture on the nanoscale. Here we describe the design, fabrication and use of programmable and scalable logic tiles for nanoprocessors that surmount these hurdles. The tiles were built from programmable, non-volatile nanowire transistor arrays. Ge/Si core/shell nanowires coupled to designed dielectric shells yielded single-nanowire, non-volatile field-effect transistors (FETs) with uniform, programmable threshold voltages and the capability to drive cascaded elements. We developed an architecture to integrate the programmable nanowire FETs and define a logic tile consisting of two interconnected arrays with 496 functional configurable FET nodes in an area of ∼960 µm(2). The logic tile was programmed and operated first as a full adder with a maximal voltage gain of ten and input-output voltage matching. Then we showed that the same logic tile can be reprogrammed and used to demonstrate full-subtractor, multiplexer, demultiplexer and clocked D-latch functions. These results represent a significant advance in the complexity and functionality of nanoelectronic circuits built from the bottom up with a tiled architecture that could be cascaded to realize fully integrated nanoprocessors with computing, memory and addressing capabilities.

Nanowire nanocomputer as a finite-state machine.

Implementation of complex computer circuits assembled from the bottom up and integrated on the nanometer scale has long been a goal of electronics research. It requires a design and fabrication strategy that can address individual nanometer-scale electronic devices, while enabling large-scale assembly of those devices into highly organized, integrated computational circuits. We describe how such a strategy has led to the design, construction, and demonstration of a nanoelectronic finite-state machine. The system was fabricated using a design-oriented approach enabled by a deterministic, bottom-up assembly process that does not require individual nanowire registration. This methodology allowed construction of the nanoelectronic finite-state machine through modular design using a multitile architecture. Each tile/module consists of two interconnected crossbar nanowire arrays, with each cross-point consisting of a programmable nanowire transistor node. The nanoelectronic finite-state machine integrates 180 programmable nanowire transistor nodes in three tiles or six total crossbar arrays, and incorporates both sequential and arithmetic logic, with extensive intertile and intratile communication that exhibits rigorous input/output matching. Our system realizes the complete 2-bit logic flow and clocked control over state registration that are required for a finite-state machine or computer. The programmable multitile circuit was also reprogrammed to a functionally distinct 2-bit full adder with 32-set matched and complete logic output. These steps forward and the ability of our unique design-oriented deterministic methodology to yield more extensive multitile systems suggest that proposed general-purpose nanocomputers can be realized in the near future.

Label-free immunodetection with CMOS-compatible semiconducting nanowires.

Semiconducting nanowires have the potential to function as highly sensitive and selective sensors for the label-free detection of low concentrations of pathogenic microorganisms. Successful solution-phase nanowire sensing has been demonstrated for ions, small molecules, proteins, DNA and viruses; however, 'bottom-up' nanowires (or similarly configured carbon nanotubes) used for these demonstrations require hybrid fabrication schemes, which result in severe integration issues that have hindered widespread application. Alternative 'top-down' fabrication methods of nanowire-like devices produce disappointing performance because of process-induced material and device degradation. Here we report an approach that uses complementary metal oxide semiconductor (CMOS) field effect transistor compatible technology and hence demonstrate the specific label-free detection of below 100 femtomolar concentrations of antibodies as well as real-time monitoring of the cellular immune response. This approach eliminates the need for hybrid methods and enables system-scale integration of these sensors with signal processing and information systems. Additionally, the ability to monitor antibody binding and sense the cellular immune response in real time with readily available technology should facilitate widespread diagnostic applications.

Holey carbon micro-arrays for transmission electron microscopy: a microcontact printing approach.

We have used a microcontact printing approach to produce high quality and inexpensive holey carbon micro-arrays. Fabrication involves: (1) micromolding a poly(dimethylsiloxane) (PDMS) elastomer stamp from a microfabricated master that contains the desired array pattern; (2) using the PDMS stamp for microcontact printing a thin sacrificial plastic film that contains an array of holes; (3) floating the plastic film onto TEM grids; (4) evaporating carbon onto the plastic film and (5) removing the sacrificial plastic film. The final holey carbon micro-arrays are ready for use as support films in TEM applications with the fidelity of the original microfabricated pattern. This approach is cost effective as both the master and the stamps have long-term reusability. Arbitrary array patterns can be made with microfabricated masters made through a single-step photolithographic process.

Micromolded PDMS planar electrode allows patch clamp electrical recordings from cells.

The patch clamp method measures membrane currents at very high resolution when a high-resistance 'gigaseal' is established between the glass microelectrode and the cell membrane (Pflugers Arch. 391 (1981) 85; Neuron 8 (1992) 605). Here we describe the first use of the silicone elastomer, poly(dimethylsiloxane) (PDMS), for patch clamp electrodes. PDMS is an attractive material for patch clamp recordings. It has low dielectric loss and can be micromolded (Annu. Rev. Mat. Sci. 28 (1998) 153) into a shape that mimics the tip of the glass micropipette. Also, the surface chemistry of PDMS may be altered to mimic the hydrophilic nature of glass (J. Appl. Polym. Sci. 14 (1970) 2499; Annu. Rev. Mat. Sci. 28 (1998) 153), thereby allowing a high-resistance seal to a cell membrane. We present a planar electrode geometry consisting of a PDMS partition with a small aperture sealed between electrode and bath chambers. We demonstrate that a planar PDMS patch electrode, after oxidation of the elastomeric surface, permits patch clamp recording on Xenopus oocytes. Our results indicate the potential for high-throughput patch clamp recording with a planar array of PDMS electrodes.

An air-molding technique for fabricating PDMS planar patch-clamp electrodes.

We present a new technique for fabricating planar patch electrodes in the laboratory. Planar electrodes are micromolded using a micron-sized stream of air to define an aperture in the silicone elastomer, polydimethylsiloxane (PDMS). We have previously demonstrated that planar PDMS electrodes make excellent patch electrodes after surface modification. We demonstrate single-channel measurements of the rSlo channel in Xenopus oocytes and whole-cell measurements in CHO and RBL mammalian cell lines, using planar PDMS electrodes.